soc/amd/stoneyridge: Add IOMMU support
Enable the IOMMU in AGESA and copy the AGESA generated IVRS ACPI table.
BUG=b:116196614
TEST=Check dmesg for AMD-Vi messages.
Change-Id: I688d867c7bd4949a57b27c1b6a793c6a6e4a717a
Signed-off-by: Marc Jones <marc.jones@scarletltd.com>
Reviewed-on: https://review.coreboot.org/28753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index a8db2c2..c54b652 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -97,6 +97,7 @@
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-y += gpio.c
ramstage-y += hda.c
+ramstage-y += iommu.c
ramstage-y += monotonic_timer.c
ramstage-y += southbridge.c
ramstage-y += sb_util.c
diff --git a/src/soc/amd/stoneyridge/iommu.c b/src/soc/amd/stoneyridge/iommu.c
new file mode 100644
index 0000000..e33402a
--- /dev/null
+++ b/src/soc/amd/stoneyridge/iommu.c
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <lib.h>
+
+static void iommu_read_resources(struct device *dev)
+{
+ struct resource *res;
+
+ /* Get the normal pci resources of this device */
+ pci_dev_read_resources(dev);
+
+ /* Add an extra subtractive resource for both memory and I/O. */
+ res = new_resource(dev, 0x44);
+ res->size = 512 * 1024;
+ res->align = log2(res->size);
+ res->gran = log2(res->size);
+ res->limit = 0xffffffff; /* 4G */
+ res->flags = IORESOURCE_MEM;
+}
+
+static struct pci_operations lops_pci = {
+ .set_subsystem = pci_dev_set_subsystem,
+};
+
+static struct device_operations iommu_ops = {
+ .read_resources = iommu_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = 0,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
+};
+
+static const struct pci_driver iommu_driver __pci_driver = {
+ .ops = &iommu_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU,
+};
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 912daa0..95c2a07 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -508,7 +508,7 @@
void SetNbEnvParams(GNB_ENV_CONFIGURATION *params)
{
- params->IommuSupport = FALSE;
+ params->IommuSupport = TRUE;
set_board_env_params(params);
}