tgl mainboards: Move usb{2,3}_ports settings into XHCI device scope
Change-Id: Ide5126c6e642ca16249efeaf46321724f2ddce9a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
diff --git a/src/mainboard/google/volteer/variants/malefor/overridetree.cb b/src/mainboard/google/volteer/variants/malefor/overridetree.cb
index 62d8190..1942657 100644
--- a/src/mainboard/google/volteer/variants/malefor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/malefor/overridetree.cb
@@ -1,14 +1,5 @@
chip soc/intel/tigerlake
- # USB Port Config
- register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
- register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C C1
- register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera
- register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C C0
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
-
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port A0
-
register "SaGv" = "SaGv_Disabled"
register "TcssAuxOri" = "1"
@@ -113,6 +104,16 @@
end
end
device ref south_xhci on
+ register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC_SKIP), // Type-A Port A0
+ [3] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C C1
+ [4] = USB2_PORT_MID(OC_SKIP), // M.2 Camera
+ [8] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C C0
+ [9] = USB2_PORT_MID(OC_SKIP), // M.2 Bluetooth
+ }"
+
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port A0
+
chip drivers/usb/acpi
device ref xhci_root_hub on
chip drivers/usb/acpi