tgl mainboards: Move usb{2,3}_ports settings into XHCI device scope
Change-Id: Ide5126c6e642ca16249efeaf46321724f2ddce9a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
diff --git a/src/mainboard/google/volteer/variants/halvor/overridetree.cb b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
index 138d557..589dfaf 100644
--- a/src/mainboard/google/volteer/variants/halvor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
@@ -1,10 +1,4 @@
chip soc/intel/tigerlake
- register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C Port 0
- register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C Port 1
- register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Front Camera
- register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C Port 2
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Reserve for CNVi BT
-
register "SaGv" = "SaGv_Disabled"
device domain 0 on
@@ -128,6 +122,14 @@
end
end
device ref south_xhci on
+ register "usb2_ports" = "{
+ [1] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C Port 0
+ [3] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C Port 1
+ [4] = USB2_PORT_MID(OC_SKIP), // Front Camera
+ [5] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C Port 2
+ [9] = USB2_PORT_MID(OC_SKIP), // Reserve for CNVi BT
+ }"
+
chip drivers/usb/acpi
device ref xhci_root_hub on
chip drivers/usb/acpi