commit bc3261f8283ba11c389e8cfcc0089390a133c589
author Arthur Heymans <arthur@aheymans.xyz> Mon Jan 30 13:32:44 2023 +0100
committer Paul Fagerburg <pfagerburg@chromium.org> Sat Feb 04 01:42:43 2023 +0000
tree 8c4eae5f1a07b9e4ff28c94ba0b2d79414b1cab2
parent b5df65a9aaee50421913ace6d7a4b35e0ddff676

util/autoport: Use chipset.cb references

TESTED with x220 logs.

Change-Id: I89023b6c6dd5d985168331fbb12b2fc36fb65dc3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>

util/autoport/main.go

diff --git a/util/autoport/main.go b/util/autoport/main.go
index 9b0b436..ed7cb0e 100644
--- a/util/autoport/main.go
+++ b/util/autoport/main.go
@@ -238,6 +238,7 @@
 
 type PCISlot struct {
 	PCIAddr
+	alias             string
 	additionalComment string
 	writeEmpty        bool
 }
@@ -361,14 +362,18 @@
 	}
 }
 
-func WriteDev(dt *os.File, offset int, dev DevTreeNode) {
+func WriteDev(dt *os.File, offset int, alias string, dev DevTreeNode) {
 	Offset(dt, offset)
 	switch dev.Chip {
 	case "cpu_cluster", "lapic", "domain", "ioapic":
 		fmt.Fprintf(dt, "device %s 0x%x ", dev.Chip, dev.Dev)
 		writeOn(dt, dev)
 	case "pci", "pnp":
-		fmt.Fprintf(dt, "device %s %02x.%x ", dev.Chip, dev.Dev, dev.Func)
+		if alias != "" {
+			fmt.Fprintf(dt, "device ref %s ", alias)
+		} else {
+			fmt.Fprintf(dt, "device %s %02x.%x ", dev.Chip, dev.Dev, dev.Func)
+		}
 		writeOn(dt, dev)
 	case "i2c":
 		fmt.Fprintf(dt, "device %s %02x ", dev.Chip, dev.Dev)
@@ -422,7 +427,14 @@
 	}
 
 	for _, child := range dev.Children {
-		WriteDev(dt, offset+1, child)
+		alias = ""
+		for _, slot := range dev.PCISlots {
+			if slot.PCIAddr.Bus == child.Bus &&
+				slot.PCIAddr.Dev == child.Dev && slot.PCIAddr.Func == child.Func {
+				alias = slot.alias
+			}
+		}
+		WriteDev(dt, offset+1, alias, child)
 	}
 
 	Offset(dt, offset)
@@ -739,7 +751,7 @@
 	defer devtree.Close()
 
 	MatchDev(&DevTree)
-	WriteDev(devtree, 0, DevTree)
+	WriteDev(devtree, 0, "", DevTree)
 
 	if MainboardInit != "" || MainboardEnable != "" || MainboardIncludes != nil {
 		mainboard := Create(ctx, "mainboard.c")