tree 85249be08e8da68f9f7d1aaa5d09454f00febb83
parent 1318ab475ddcae5fdd8f41b66c4d7034c8b3d396
author Angel Pons <th3fanbus@gmail.com> 1611145398 +0100
committer Angel Pons <th3fanbus@gmail.com> 1612048364 +0000

nb/intel/x4x: Define and use MMCONF_BUS_NUMBER

Note that bootblock.c originally wrote a reserved bit of the PCIEXBAR
register. The `length` bitfield was set to 0, so assume 256 busses.
Moreover, the ASL reservation for MMCONFIG was only for 64 busses.

Change-Id: I7366a5096aacd92401535be020358447650b4247
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49759
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>