src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c
index 083d064..8284ec8 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.c
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.c
@@ -166,7 +166,7 @@
/* For CF socket we need an extra memory window for
* the control structure of the CF itself
*/
- if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
+ if ( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
/* fake index as it isn't in PCI config space */
resource = new_resource(dev, 1);
resource->flags |= IORESOURCE_MEM;
@@ -181,9 +181,9 @@
{
struct resource *resource;
printk(BIOS_DEBUG, "%s In set resources\n",dev_path(dev));
- if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
+ if ( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
resource = find_resource(dev,1);
- if( !(resource->flags & IORESOURCE_STORED) ){
+ if ( !(resource->flags & IORESOURCE_STORED) ){
resource->flags |= IORESOURCE_STORED ;
printk(BIOS_DEBUG, "%s 1 ==> %llx\n", dev_path(dev), resource->base);
cf_base = resource->base;