soc/amd: Make espi_clear_decodes private
espi_setup already clears most of the controller registers. So this
change consolidates the clear logic into one spot.
This shouldn't result in a behavior change on Picasso. Picasso already
has the eSPI decodes clear on boot, so this change is a nop.
BUG=b:183524609
TEST=Boot guybrush to the OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ic57689e50febd29796d8ac8d99c81e41fee5b41c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c
index 0b690b8..f120082 100644
--- a/src/soc/amd/common/block/lpc/espi_util.c
+++ b/src/soc/amd/common/block/lpc/espi_util.c
@@ -98,7 +98,7 @@
return -1;
}
-void espi_clear_decodes(void)
+static void espi_clear_decodes(void)
{
unsigned int idx;
@@ -894,6 +894,7 @@
espi_write32(ESPI_GLOBAL_CONTROL_1, ESPI_RGCMD_INT(23) | ESPI_ERR_INT_SMI);
espi_write32(ESPI_SLAVE0_INT_EN, 0);
espi_clear_status();
+ espi_clear_decodes();
/*
* Boot sequence: Step 1