mb/intel/adlrvp: remove I2S2 GPIO settings
It turns out that there is no device connected to I2S2.
This patch clarifies the GPIO settings device association and remove
unnecessary configuration.
GPP_A8 -> default: GP-in ; set to NF1: SRCCLKREQ7#
GPP_A9 -> default: NF1: ESPI_CLK
GPP_A10 -> default: NF1: ESPI_RESET#
BRANCH=firmware-brya-14505.B
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: I7a575f495d841fe0bf6fd86a84caeee064f6904b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index d7cc6bd..4454958 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -7,6 +7,10 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
+
+ /* GPIO A0-A6, A9-A10 default function is NF1 for eSPI interface when
+ eSPI is enabled */
+
/* SSD1_PWREN CPU SSD1 */
PAD_CFG_GPO(GPP_D14, 1, PLTRST),
/* SSD1_RESET CPU SSD1 */
@@ -187,13 +191,6 @@
/* I2S0_RXD */
PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2),
- /* I2S2_SFRM */
- PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
- /* I2S2_TXD */
- PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
- /* I2S2_RXD */
- PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
-
/* I2S_MCLK1_OUT */
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
/* I2S_MCLK2_INOUT */
@@ -240,6 +237,7 @@
PAD_NC(GPP_D8, NONE),
PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
+ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
/* DDP1/2/3/4/A/B/C CTRLCLK and CTRLDATA pins */
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF4),