commit b8b0c66cffe1edaf2ddff66c17943d0f5d774330
author Felix Held <felix-coreboot@felixheld.de> Thu Jul 20 20:43:41 2023 +0200
committer Felix Held <felix-coreboot@felixheld.de> Tue Jul 25 13:34:12 2023 +0000
tree 159bb926e0dc30e85b7e10936e910ef6d3a8407e
parent 32169720bb6756faba38148d2425c0a85df117c1

soc/amd/common/acpi/ivrs: probe IOAPIC device on domain device

This reverts commit e33d253793f6 ("soc/amd/common/block/acpi/ivrs: fix
missing IOAPIC[1] error").

Now that the per PCI root domain IOAPIC MMIO resource is reported on the
domain device, we can again probe the resource on the domain device
instead of the northbridge PCI device in that domain. This will make the
IVRS code compatible again with the work in progress Genoa SoC support.

TEST=Linux doesn't complain about the IOAPIC[1] missing in the IVRS on
Mandolin.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib861b19d798fc8ee6603e8803d8d1939be08d275
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76659
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>

src/soc/amd/common/block/acpi/ivrs.c

diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c
index 1735690..814f514 100644
--- a/src/soc/amd/common/block/acpi/ivrs.c
+++ b/src/soc/amd/common/block/acpi/ivrs.c
@@ -182,8 +182,7 @@
 	add_ivhd_device_entries(NULL, dev, 0, -1, &root_level,
 		&current, dev->link_list->secondary);
 
-	res = probe_resource(pcidev_path_behind(dev->link_list, PCI_DEVFN(0, 0)),
-			     IOMMU_IOAPIC_IDX);
+	res = probe_resource(dev, IOMMU_IOAPIC_IDX);
 	if (res) {
 		/* Describe IOAPIC associated with the IOMMU */
 		current = acpi_fill_ivrs_ioapic(current, (u8 *)(uintptr_t)res->base,