mb/lenovo/x60: Add vboot support
It's relatively slow to boot. It takes 1.5s to get to the payload.
In timestamps there are entries related to TPM, which are somewhat
weird given that the TPM is not enabled on this device (buggy).
TESTED: boot X60, with CONFIG_H8_FN_KEY_AS_VBOOT_RECOVERY_SW=y you
can force the recovery bootpath.
Change-Id: Ia9666194e98b7d23b97eaff08e6177684e35eca7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37148
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig
index 994a071..5083fd5 100644
--- a/src/mainboard/lenovo/x60/Kconfig
+++ b/src/mainboard/lenovo/x60/Kconfig
@@ -26,6 +26,24 @@
select I945_LVDS
select INTEL_GMA_HAVE_VBT
+config VBOOT
+ select VBOOT_VBNV_CMOS
+ select GBB_FLAG_DISABLE_LID_SHUTDOWN
+ select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_FWMP
+
+config VBOOT_SLOTS_RW_A
+ default y
+
+config VBOOT_VBNV_OFFSET
+ hex
+ default 0x76
+
+config FMDFILE
+ string
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
+
config MAINBOARD_DIR
string
default "lenovo/x60"
diff --git a/src/mainboard/lenovo/x60/cmos.layout b/src/mainboard/lenovo/x60/cmos.layout
index 58fbef5..a402f05 100644
--- a/src/mainboard/lenovo/x60/cmos.layout
+++ b/src/mainboard/lenovo/x60/cmos.layout
@@ -93,6 +93,8 @@
1040 8 r 0 RCVENMT
1048 4 r 0 C0DRT1
1052 4 r 0 C1DRT1
+
+1056 128 r 0 vbnv
# -----------------------------------------------------------------
enumerations
diff --git a/src/mainboard/lenovo/x60/vboot-rwa.fmd b/src/mainboard/lenovo/x60/vboot-rwa.fmd
new file mode 100644
index 0000000..b21cff3
--- /dev/null
+++ b/src/mainboard/lenovo/x60/vboot-rwa.fmd
@@ -0,0 +1,19 @@
+FLASH@0xffe00000 0x200000 {
+ BIOS {
+ RW_SECTION_A 0x100000 {
+ VBLOCK_A 0x10000
+ FW_MAIN_A(CBFS)
+ RW_FWID_A 0x40
+ }
+ RW_VPD(PRESERVE) 0x1000
+ CONSOLE 0x10000
+ WP_RO {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_PADDING 0x7c0
+ RO_VPD(PRESERVE) 0x1000
+ GBB 0x1e000
+ COREBOOT(CBFS)
+ }
+ }
+}