soc/amd/cezanne: Disable legacy DMA IO ports
The legacy DMA is not used by linux. This change frees up those IO
ports.
When FSP-S runs, it re-enables the legacy DMA IO region, so we need to
disable it again.
BOOTBLOCK: PMx00: 0xe3060bf3
ROMSTAGE - Before FSP: PMx00: 0xe3060bf3
ROMSTAGE - After FSP: PMx00: 0xe3060bf7
BUG=b:180949454
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I7792d1f8ea40eb1c7f6cca67e9907208884ac694
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51076
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index dd096e0..cdb1f12 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -17,6 +17,7 @@
fch_smbus_init();
fch_enable_cf9_io();
fch_enable_legacy_io();
+ fch_disable_legacy_dma_io();
enable_aoac_devices();
/*
diff --git a/src/soc/amd/cezanne/romstage.c b/src/soc/amd/cezanne/romstage.c
index 2740d8c..b35e6a5 100644
--- a/src/soc/amd/cezanne/romstage.c
+++ b/src/soc/amd/cezanne/romstage.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
+#include <amdblocks/acpimmio.h>
#include <amdblocks/memmap.h>
#include <arch/cpu.h>
#include <console/console.h>
@@ -31,6 +32,9 @@
fsp_memory_init(acpi_is_wakeup_s3());
+ /* Fixup settings FSP-M should not be changing */
+ fch_disable_legacy_dma_io();
+
memmap_stash_early_dram_usage();
run_ramstage();