mainboard/volteer: Update Aux settings for Port 0
On Volteer port 0 (MB PORT) does not have a retimer so the port needs
to be configured for the SOC to handle Aux orientation flipping. This
requires 2 changes setting the TcssAuxOri UPD to 1 for port 0 (Bit 0)
and configuring AUXP and AUXN GPIOs to Native Function 6 so SOC can
control the orientation
BUG=b:145220205
BRANCH=NONE
TEST=booted Volteer proto 2 and verified that the AUX channels flip
when the cable is flipped
Change-Id: Ic81adc24d10322cc305bf0fa4c38514468ea0942
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 273b7a8..fa99de8 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -125,7 +125,16 @@
# TCSS USB3
register "TcssXhciEn" = "1"
- register "TcssAuxOri" = "0"
+ register "TcssAuxOri" = "1"
+ register "IomTypeCPortPadCfg[0]" = "0x090E000A"
+ register "IomTypeCPortPadCfg[1]" = "0x090E000D"
+ register "IomTypeCPortPadCfg[2]" = "0x0"
+ register "IomTypeCPortPadCfg[3]" = "0x0"
+ register "IomTypeCPortPadCfg[4]" = "0x0"
+ register "IomTypeCPortPadCfg[5]" = "0x0"
+ register "IomTypeCPortPadCfg[6]" = "0x0"
+ register "IomTypeCPortPadCfg[7]" = "0x0"
+
# DP port
register "DdiPortAConfig" = "1" # eDP