mb/google/volteer/halvor: initialize gpio setting and update overridetree.cb
Based on schematic and gpio table of halvor, generate gpio setting and
overridetree.cb for halvor.
BUG=b:153680359
TEST=FW_NAME=halvor emerge-volteer coreboot chromeos-bootimage
Verify that the image-halvor.bin is generated successfully.
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: Ic6bd018551be58945742d1a6e7f7c5560f218e40
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/mainboard/google/volteer/variants/halvor/overridetree.cb b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
index 75422d8..20a90cc 100644
--- a/src/mainboard/google/volteer/variants/halvor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
@@ -1,4 +1,58 @@
chip soc/intel/tigerlake
+ register "usb2_ports[0]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used
+ register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC0)" # Type-A / Type-C Port 0
+ register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used
+ register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC1)" # Type-A / Type-C Port 1
+ register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Front Camera
+ register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC2)" # Type-A / Type-C Port 2
+ register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used
+ register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used
+ register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used
+ register "usb2_ports[9]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used
+
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A / Type-C Port 0
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A / Type-C Port 1
+ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A / Type-C Port 2
+ register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Type-A / Type-C Not Used
+
device domain 0 on
+ device pci 15.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""10EC5682""
+ register "name" = ""RT58""
+ register "desc" = ""Headset Codec""
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
+ # Set the jd_src to RT5668_JD1 for jack detection
+ register "property_count" = "1"
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ device i2c 1a on end
+ end
+ chip drivers/i2c/max98373
+ register "vmon_slot_no" = "0"
+ register "imon_slot_no" = "1"
+ register "uid" = "0"
+ register "desc" = ""Right Speaker Amp""
+ register "name" = ""MAXR""
+ device i2c 31 on end
+ end
+ chip drivers/i2c/max98373
+ register "vmon_slot_no" = "2"
+ register "imon_slot_no" = "3"
+ register "uid" = "1"
+ register "desc" = ""Left Speaker Amp""
+ register "name" = ""MAXL""
+ device i2c 32 on end
+ end
+ end # I2C #0 0xA0E8
+ device pci 1f.3 on
+ chip drivers/generic/max98357a
+ register "hid" = ""MX98357A""
+ register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F18)"
+ register "sdmode_delay" = "5"
+ device generic 0 on end
+ end
+ end # Intel HD audio 0xA0C8-A0CF
end
end