nb/intel/sandybridge/raminit: Add tCPDED corner case
tCPDED is always 1, except for steppings earlier than Sandy Bridge D0.
Reduces the differences to MRC.bin.
Tested on Lenovo X220: Still boots and runs fine.
Change-Id: I5294173c02f06c601fdb13ed785ee33d7a4e3eca
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79762
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index fea3ca4..51d6786 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -171,7 +171,7 @@
.tXPDLL = MIN(ctrl->tXPDLL, 31),
.tXP = MIN(ctrl->tXP, 7),
.tAONPD = ctrl->tAONPD,
- .tCPDED = 2,
+ .tCPDED = 1,
.tPRPDEN = 1,
};
@@ -2816,7 +2816,10 @@
union tc_othp_reg tc_othp = {
.raw = mchbar_read32(TC_OTHP_ch(channel)),
};
- tc_othp.tCPDED = 1;
+ if (IS_SANDY_CPU(ctrl->cpu) && (ctrl->cpu & 0xf) < SNB_STEP_D0)
+ tc_othp.tCPDED = 2;
+ else
+ tc_othp.tCPDED = 1;
mchbar_write32(TC_OTHP_ch(channel), tc_othp.raw);
/* 64 DCLKs until idle, decision per rank */