tree a783395988b2da75df1f6b0b680bbe8ea9c7ac80
parent 7ecc36647009ae66168d2b8b3044831b08764e73
author Mario Scheithauer <mario.scheithauer@siemens.com> 1689161994 +0200
committer Werner Zeh <werner.zeh@siemens.com> 1689244973 +0000

mb/siemens/mc_ehl4: Change GPIO GPP_B5 polarity for DRAM population

With the latest hardware revision, the polarity of GPP_B5 has been
changed. For a full-populated DRAM configuration, the input signal is
now connected to 3.3 V and for a half-populated configuration it is
connected to ground.

BUG=none
TEST=Use different populated mainboards and check coreboot log

GPP_B5 = 0:
[INFO ]  meminit_channels: DRAM half-populated
[DEBUG]  1 DIMMs found

GPP_B5 = 1:
[DEBUG]  2 DIMMs found

Change-Id: Iaa3a63fa52c802d8f5d8c6cc11dd6edfac117e88
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76434
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>