Add high tables support to all northbridges.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/northbridge/intel/e7501/Config.lb b/src/northbridge/intel/e7501/Config.lb
index 59154f7..2a8095f 100644
--- a/src/northbridge/intel/e7501/Config.lb
+++ b/src/northbridge/intel/e7501/Config.lb
@@ -1,3 +1,7 @@
+uses HAVE_HIGH_TABLES
+
config chip.h
object northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index b1d553a..7168bf3 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -65,6 +65,11 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -140,6 +145,12 @@
ram_resource(dev, idx++, remapbasek,
(remaplimitk + 64*1024) - remapbasek);
}
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}
diff --git a/src/northbridge/intel/e7520/Config.lb b/src/northbridge/intel/e7520/Config.lb
index 064c867..03a7897 100644
--- a/src/northbridge/intel/e7520/Config.lb
+++ b/src/northbridge/intel/e7520/Config.lb
@@ -1,3 +1,5 @@
+uses HAVE_HIGH_TABLES
+
config chip.h
driver northbridge.o
driver pciexp_porta.o
@@ -5,6 +7,8 @@
driver pciexp_portb.o
driver pciexp_portc.o
+default HAVE_HIGH_TABLES=1
+
makerule raminit_test
depends "$(TOP)/src/northbridge/intel/e7520/raminit_test.c"
depends "$(TOP)/src/northbridge/intel/e7520/raminit.c"
diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index ad44c9b..f2b2a0f 100644
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -76,6 +76,10 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -164,6 +168,12 @@
ram_resource(dev, 6, remapbasek,
(remaplimitk + 64*1024) - remapbasek);
}
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}
diff --git a/src/northbridge/intel/e7525/Config.lb b/src/northbridge/intel/e7525/Config.lb
index 919e0f8..07930ff 100644
--- a/src/northbridge/intel/e7525/Config.lb
+++ b/src/northbridge/intel/e7525/Config.lb
@@ -1,3 +1,5 @@
+uses HAVE_HIGH_TABLES
+
config chip.h
driver northbridge.o
driver pciexp_porta.o
@@ -5,6 +7,8 @@
driver pciexp_portb.o
driver pciexp_portc.o
+default HAVE_HIGH_TABLES=1
+
makerule raminit_test
depends "$(TOP)/src/northbridge/intel/e7525/raminit_test.c"
depends "$(TOP)/src/northbridge/intel/e7525/raminit.c"
diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c
index 2ed8922..7900129 100644
--- a/src/northbridge/intel/e7525/northbridge.c
+++ b/src/northbridge/intel/e7525/northbridge.c
@@ -76,6 +76,10 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -164,6 +168,12 @@
ram_resource(dev, 6, remapbasek,
(remaplimitk + 64*1024) - remapbasek);
}
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}
diff --git a/src/northbridge/intel/i3100/Config.lb b/src/northbridge/intel/i3100/Config.lb
index ea4c8eb..1534605 100644
--- a/src/northbridge/intel/i3100/Config.lb
+++ b/src/northbridge/intel/i3100/Config.lb
@@ -17,6 +17,11 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+uses HAVE_HIGH_TABLES
+
config chip.h
+
driver northbridge.o
driver pciexp_porta.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index d36af7c..928fe94 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -97,6 +97,10 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -185,6 +189,12 @@
ram_resource(dev, 6, remapbasek,
(remaplimitk + 64*1024) - remapbasek);
}
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}
diff --git a/src/northbridge/intel/i440bx/Config.lb b/src/northbridge/intel/i440bx/Config.lb
index 82a05ee..c9a26b0 100644
--- a/src/northbridge/intel/i440bx/Config.lb
+++ b/src/northbridge/intel/i440bx/Config.lb
@@ -18,5 +18,10 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+uses HAVE_HIGH_TABLES
+
config chip.h
+
driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 306e73e..f95a1a7 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -91,6 +91,10 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -127,6 +131,12 @@
idx = 10;
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
diff --git a/src/northbridge/intel/i82810/Config.lb b/src/northbridge/intel/i82810/Config.lb
index e8d57b2..04375d8 100644
--- a/src/northbridge/intel/i82810/Config.lb
+++ b/src/northbridge/intel/i82810/Config.lb
@@ -18,5 +18,10 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+uses HAVE_HIGH_TABLES
+
config chip.h
+
driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index eb8a657..bfbd338 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -122,6 +122,11 @@
/* MB */0, 8, 0, 16, 16, 24, 32, 32, 48, 64, 64, 96, 128, 128, 192, 256,
};
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -166,6 +171,12 @@
idx = 10;
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 1024, tolmk - 1024);
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}
diff --git a/src/northbridge/intel/i82830/Config.lb b/src/northbridge/intel/i82830/Config.lb
index d2ccd5d..f55eab2 100644
--- a/src/northbridge/intel/i82830/Config.lb
+++ b/src/northbridge/intel/i82830/Config.lb
@@ -18,5 +18,10 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+uses HAVE_HIGH_TABLES
+
config chip.h
+
driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index 689bf19..bf79ecd 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -107,6 +107,10 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -144,6 +148,12 @@
idx = 10;
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 1024, tolmk - 1024);
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}
diff --git a/src/northbridge/intel/i855gme/Config.lb b/src/northbridge/intel/i855gme/Config.lb
index 5a7cd14..83edd47 100644
--- a/src/northbridge/intel/i855gme/Config.lb
+++ b/src/northbridge/intel/i855gme/Config.lb
@@ -18,7 +18,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-config chip.h
-object northbridge.o
-#driver misc_control.o
+uses HAVE_HIGH_TABLES
+config chip.h
+
+object northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i855gme/northbridge.c b/src/northbridge/intel/i855gme/northbridge.c
index e5fecf1..ec42c6e 100644
--- a/src/northbridge/intel/i855gme/northbridge.c
+++ b/src/northbridge/intel/i855gme/northbridge.c
@@ -88,6 +88,10 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -143,6 +147,11 @@
/* ram_resource(dev, idx++, 1024, tolmk - 1024); */
ram_resource(dev, idx++, 768, tolmk - 768);
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}
diff --git a/src/northbridge/intel/i855pm/Config.lb b/src/northbridge/intel/i855pm/Config.lb
index f101a92..2a8095f 100644
--- a/src/northbridge/intel/i855pm/Config.lb
+++ b/src/northbridge/intel/i855pm/Config.lb
@@ -1,4 +1,7 @@
-config chip.h
-object northbridge.o
-#driver misc_control.o
+uses HAVE_HIGH_TABLES
+config chip.h
+
+object northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i855pm/northbridge.c b/src/northbridge/intel/i855pm/northbridge.c
index 6064854..4fbd3b3 100644
--- a/src/northbridge/intel/i855pm/northbridge.c
+++ b/src/northbridge/intel/i855pm/northbridge.c
@@ -66,6 +66,11 @@
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -108,6 +113,12 @@
idx = 10;
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}