mb/*: Replace SNB PCI devices with references from chipset.cb
Removing default on/off from mainboard devicetrees is left as a follow-up.
Change-Id: I74c34a97ea4340fb11a0db422a48e1418221627e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69502
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
diff --git a/src/mainboard/asus/p8x7x-series/devicetree.cb b/src/mainboard/asus/p8x7x-series/devicetree.cb
index 75566d1..0dc77f3 100644
--- a/src/mainboard/asus/p8x7x-series/devicetree.cb
+++ b/src/mainboard/asus/p8x7x-series/devicetree.cb
@@ -2,9 +2,9 @@
chip northbridge/intel/sandybridge
device domain 0 on
- device pci 00.0 on end # Host bridge
- device pci 01.0 on end # PCIEX16_1
- device pci 02.0 on end # iGPU
+ device ref host_bridge on end # Host bridge
+ device ref peg10 on end # PCIEX16_1
+ device ref igd on end # iGPU
chip southbridge/intel/bd82x6x
register "sata_interface_speed_support" = "0x3"
@@ -15,32 +15,32 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device pci 14.0 on end # xHCI
- device pci 16.0 on end # MEI #1
- device pci 16.1 off end # MEI #2
- device pci 16.2 off end # ME IDE-R
- device pci 16.3 off end # ME KT
- device pci 19.0 off end # Intel GbE
- device pci 1a.0 on end # EHCI #2
- device pci 1b.0 on end # HD Audio
+ device ref xhci on end # xHCI
+ device ref mei1 on end # MEI #1
+ device ref mei2 off end # MEI #2
+ device ref me_ide_r off end # ME IDE-R
+ device ref me_kt off end # ME KT
+ device ref gbe off end # Intel GbE
+ device ref ehci2 on end # EHCI #2
+ device ref hda on end # HD Audio
- device pci 1c.0 off end # RP #1
- device pci 1c.1 off end # RP #2
- device pci 1c.2 off end # RP #3
- device pci 1c.3 off end # RP #4
- device pci 1c.4 off end # RP #5
- device pci 1c.5 off end # RP #6
- device pci 1c.6 off end # RP #7
- device pci 1c.7 off end # RP #8
+ device ref pcie_rp1 off end # RP #1
+ device ref pcie_rp2 off end # RP #2
+ device ref pcie_rp3 off end # RP #3
+ device ref pcie_rp4 off end # RP #4
+ device ref pcie_rp5 off end # RP #5
+ device ref pcie_rp6 off end # RP #6
+ device ref pcie_rp7 off end # RP #7
+ device ref pcie_rp8 off end # RP #8
- device pci 1d.0 on end # EHCI #1
- device pci 1e.0 off end # PCI bridge
- device pci 1f.0 on # LPC bridge
+ device ref ehci1 on end # EHCI #1
+ device ref pci_bridge off end # PCI bridge
+ device ref lpc on # LPC bridge
end
- device pci 1f.2 on end # SATA (AHCI)
- device pci 1f.3 on end # SMBus
- device pci 1f.5 off end # SATA (Legacy)
- device pci 1f.6 off end # Thermal
+ device ref sata1 on end # SATA (AHCI)
+ device ref smbus on end # SMBus
+ device ref sata2 off end # SATA (Legacy)
+ device ref thermal off end # Thermal
end
end
end