soc/amd/phoenix/include/soc/smi: add missing SCI map defines 61-63
In the PPRs #57019 Rev 3.03 and #57396 Rev 3.04, SMITYPE_XHC3_PME,
SMITYPE_XHC4_PME and SMITYPE_CUR_TEMP_STATUS_5 are defined, so add those
defines. When doing the initial update for Phoenix, at least XHC3 and
XHC4 PME events were missing from the PPR. Those two are the PME events
of the two USB4 controllers. SMITYPE_XHC2_PME doesn't exist on this SoC.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic6fff9175b73cc9d0fd324d4a568a5761b92d078
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
diff --git a/src/soc/amd/phoenix/include/soc/smi.h b/src/soc/amd/phoenix/include/soc/smi.h
index 034a327..e99b172 100644
--- a/src/soc/amd/phoenix/include/soc/smi.h
+++ b/src/soc/amd/phoenix/include/soc/smi.h
@@ -102,7 +102,10 @@
#define SMITYPE_XHC0_PME 56
#define SMITYPE_XHC1_PME 57
#define SMITYPE_ACDC_TIMER 58
-/* 59-63 Reserved */
+/* 59-60 Reserved */
+#define SMITYPE_XHC3_PME 61
+#define SMITYPE_XHC4_PME 62
+#define SMITYPE_CUR_TEMP_STATUS_5 63
#define SMITYPE_KB_RESET 64
#define SMITYPE_SLP_TYP 65
#define SMITYPE_AL2H_ACPI 66