soc/amd/glinda/chip: use common data fabric domain resource code
Use the new common AMD code that gets the usable non-fixed MMIO windows
from the data fabric MMIO decode registers and generate the PCI0 _CRS
ACPI code based on those regions. For a more detailed description see
the corresponding patch that changes the Picasso code to use this new
code. In contrast to the Picasso code, this change will drop the
unneeded _STA method inside the PCI0 scope which wasn't present in
Picasso's ACPI code before it got replaced by the SSDT that gets
generated by amd_pci_domain_fill_ssdt.
TEST=None
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I948d882b2e2c6d19f73c0be094e4ff6e42ec81d6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75560
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig
index d80eb3f..fe20591 100644
--- a/src/soc/amd/glinda/Kconfig
+++ b/src/soc/amd/glinda/Kconfig
@@ -46,6 +46,7 @@
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
+ select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN
select SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_HAS_ESPI # TODO: Check if this is still correct