commit b37d01d3093d45528b1447d792d88f85607595ca
author Kyösti Mälkki <kyosti.malkki@gmail.com> Thu Jul 21 21:08:28 2016 +0300
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Sat Jul 23 19:09:49 2016 +0200
tree 9f0479e4cf998d77ad54a7339769908c6c8d58f1
parent a38677b6646fae7284d08fef706a77478c38c547

intel/haswell: Add asmlinkage for romstage_after_car()

Change-Id: Ib3c973d2e89d4c25c3bf1e52662fbfcb4b1e4355
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15789
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/cpu/intel/haswell/haswell.h

diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index 8298fb1..41cd5ba 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -183,7 +183,7 @@
 void * asmlinkage romstage_main(unsigned long bist);
 /* romstage_after_car() is the C function called after cache-as-ram has
  * been torn down. It is responsible for loading the ramstage. */
-void romstage_after_car(void);
+void asmlinkage romstage_after_car(void);
 #endif
 
 #ifdef __SMM__

src/cpu/intel/haswell/romstage.c

diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 9154316..8b15ed5 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -259,7 +259,7 @@
 	}
 }
 
-void romstage_after_car(void)
+void asmlinkage romstage_after_car(void)
 {
 	/* Load the ramstage. */
 	run_ramstage();