soc/intel/*/pmc: Add `finalize` operation for pmc
This patch implements the required operations to perform prior to
booting to OS using coreboot native driver when platform decides
to skip FSP notify APIs, i.e., Ready to Boot and End Of Firmware.
Additionally, move the PMCON status bit clear operation to `.final` ops
to cover any such chances where FSP-S Notify Phase or any other later
boot stage may request a global reset and PMCON status bit remains set.
BUG=b:211954778
TEST=Able to build brya with these changes.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I0a0b869849d5d8c76031b8999f3d28817ac69247
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61649
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
diff --git a/src/soc/intel/alderlake/pmc.c b/src/soc/intel/alderlake/pmc.c
index 0d52368..cce095a 100644
--- a/src/soc/intel/alderlake/pmc.c
+++ b/src/soc/intel/alderlake/pmc.c
@@ -171,6 +171,22 @@
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL);
+/*
+ * `pmc_final` function is native implementation of equivalent events performed by
+ * each FSP NotifyPhase() API invocations.
+ *
+ *
+ * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits)
+ *
+ * Perform the PMCON status bit clear operation from `.final`
+ * to cover any such chances where later boot stage requested a global
+ * reset and PMCON status bit remains set.
+ */
+static void pmc_final(struct device *dev)
+{
+ pmc_clear_pmcon_sts();
+}
+
struct device_operations pmc_ops = {
.read_resources = soc_pmc_read_resources,
.set_resources = noop_set_resources,
@@ -180,4 +196,5 @@
.acpi_fill_ssdt = soc_pmc_fill_ssdt,
#endif
.scan_bus = scan_static_bus,
+ .final = pmc_final,
};
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index 4c88685..b0febd0 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -135,6 +135,22 @@
generate_acpi_power_engine();
}
+/*
+ * `pmc_final` function is native implementation of equivalent events performed by
+ * each FSP NotifyPhase() API invocations.
+ *
+ *
+ * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits)
+ *
+ * Perform the PMCON status bit clear operation from `.final`
+ * to cover any such chances where later boot stage requested a global
+ * reset and PMCON status bit remains set.
+ */
+static void pmc_final(struct device *dev)
+{
+ pmc_clear_pmcon_sts();
+}
+
struct device_operations pmc_ops = {
.read_resources = soc_pmc_read_resources,
.set_resources = noop_set_resources,
@@ -144,4 +160,5 @@
.acpi_fill_ssdt = pmc_fill_ssdt,
#endif
.scan_bus = scan_static_bus,
+ .final = pmc_final,
};
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index 8598cb5..333bace 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -8,6 +8,7 @@
#include <intelblocks/acpi.h>
#include <intelblocks/pmc.h>
#include <soc/pci_devs.h>
+#include <soc/pm.h>
static void pch_pmc_add_new_resource(struct device *dev,
uint8_t offset, uintptr_t base, size_t size,
@@ -80,6 +81,22 @@
generate_acpi_power_engine();
}
+/*
+ * `pmc_final` function is native implementation of equivalent events performed by
+ * each FSP NotifyPhase() API invocations.
+ *
+ *
+ * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits)
+ *
+ * Perform the PMCON status bit clear operation from `.final`
+ * to cover any such chances where later boot stage requested a global
+ * reset and PMCON status bit remains set.
+ */
+static void pmc_final(struct device *dev)
+{
+ pmc_clear_pmcon_sts();
+}
+
static struct device_operations device_ops = {
.read_resources = pch_pmc_read_resources,
.set_resources = pci_dev_set_resources,
@@ -90,6 +107,7 @@
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt = pmc_fill_ssdt,
#endif
+ .final = pmc_final,
};
static const unsigned short pci_device_ids[] = {
diff --git a/src/soc/intel/elkhartlake/pmc.c b/src/soc/intel/elkhartlake/pmc.c
index 53193ea..cf736dd 100644
--- a/src/soc/intel/elkhartlake/pmc.c
+++ b/src/soc/intel/elkhartlake/pmc.c
@@ -109,6 +109,22 @@
generate_acpi_power_engine();
}
+/*
+ * `pmc_final` function is native implementation of equivalent events performed by
+ * each FSP NotifyPhase() API invocations.
+ *
+ *
+ * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits)
+ *
+ * Perform the PMCON status bit clear operation from `.final`
+ * to cover any such chances where later boot stage requested a global
+ * reset and PMCON status bit remains set.
+ */
+static void pmc_final(struct device *dev)
+{
+ pmc_clear_pmcon_sts();
+}
+
struct device_operations pmc_ops = {
.read_resources = soc_pmc_read_resources,
.set_resources = noop_set_resources,
@@ -117,4 +133,5 @@
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt = pmc_fill_ssdt,
#endif
+ .final = pmc_final,
};
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c
index fd91cde..c009600 100644
--- a/src/soc/intel/icelake/pmc.c
+++ b/src/soc/intel/icelake/pmc.c
@@ -75,6 +75,15 @@
*/
if (!CONFIG(USE_PM_ACPI_TIMER))
setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS);
+
+ /*
+ * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits)
+ *
+ * Perform the PMCON status bit clear operation from `.final`
+ * to cover any such chances where later boot stage requested a global
+ * reset and PMCON status bit remains set.
+ */
+ pmc_clear_pmcon_sts();
}
/*
diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c
index 47c3bb1..5ad692b 100644
--- a/src/soc/intel/jasperlake/pmc.c
+++ b/src/soc/intel/jasperlake/pmc.c
@@ -117,6 +117,22 @@
generate_acpi_power_engine();
}
+/*
+ * `pmc_final` function is native implementation of equivalent events performed by
+ * each FSP NotifyPhase() API invocations.
+ *
+ *
+ * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits)
+ *
+ * Perform the PMCON status bit clear operation from `.final`
+ * to cover any such chances where later boot stage requested a global
+ * reset and PMCON status bit remains set.
+ */
+static void pmc_final(struct device *dev)
+{
+ pmc_clear_pmcon_sts();
+}
+
struct device_operations pmc_ops = {
.read_resources = soc_pmc_read_resources,
.set_resources = noop_set_resources,
@@ -125,4 +141,5 @@
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt = pmc_fill_ssdt,
#endif
+ .final = pmc_final,
};
diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c
index 8788170..937943a 100644
--- a/src/soc/intel/tigerlake/pmc.c
+++ b/src/soc/intel/tigerlake/pmc.c
@@ -170,6 +170,22 @@
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL);
+/*
+ * `pmc_final` function is native implementation of equivalent events performed by
+ * each FSP NotifyPhase() API invocations.
+ *
+ *
+ * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits)
+ *
+ * Perform the PMCON status bit clear operation from `.final`
+ * to cover any such chances where later boot stage requested a global
+ * reset and PMCON status bit remains set.
+ */
+static void pmc_final(struct device *dev)
+{
+ pmc_clear_pmcon_sts();
+}
+
struct device_operations pmc_ops = {
.read_resources = soc_pmc_read_resources,
.set_resources = noop_set_resources,
@@ -179,4 +195,5 @@
.acpi_fill_ssdt = soc_pmc_fill_ssdt,
#endif
.scan_bus = scan_static_bus,
+ .final = pmc_final,
};