commit b2d68976c830c3b4eddf78ea788f02cfa6d25ffc
author Edward O'Callaghan <eocallaghan@alterapraxis.com> Thu May 15 21:23:51 2014 +1000
committer Marc Jones <marc.jones@se-eng.com> Mon May 19 22:39:01 2014 +0200
tree afae4f535d4e64456bc7bb003489251b6bc4a2e0
parent e1845b38c7cd4c6e18b07d82d2ba6aebd9b8170f

amd/agesa: Implicit assigment between enum without cast

Change-Id: I31632948ce69b2d1ff63b6c920016ed6fdf9e2f8
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5760
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c

diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c
index 2ad6e12..942fe1f 100644
--- a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c
+++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c
@@ -206,7 +206,7 @@
           ASSERT ((NBPtr->ChannelPtr->TechType == DDR3_TECHNOLOGY) ?
             ((MEMORY_BUS_SPEED)ChnlTmgMod[1] >= DDR667_FREQUENCY) :
             ((MEMORY_BUS_SPEED)ChnlTmgMod[1] <= DDR1066_FREQUENCY));
-          MemClkFreq = ChnlTmgMod[1];
+          MemClkFreq = (MEMORY_BUS_SPEED) ChnlTmgMod[1];
         }
       }
 

src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c

diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c
index eac35b7..3664dc5 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c
@@ -178,7 +178,7 @@
 //          ASSERT ((NBPtr->ChannelPtr->TechType == DDR3_TECHNOLOGY) ?
 //            (ChnlTmgMod[1] >= DDR667_FREQUENCY) :
 //            (ChnlTmgMod[1] <= DDR1066_FREQUENCY));
-          MemClkFreq = ChnlTmgMod[1];
+          MemClkFreq = (MEMORY_BUS_SPEED) ChnlTmgMod[1];
         }
       }
 

src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c

diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c
index 613aadd..9ff66f2 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c
@@ -186,7 +186,7 @@
           ASSERT ((NBPtr->ChannelPtr->TechType == DDR3_TECHNOLOGY) ?
             ((MEMORY_BUS_SPEED)(ChnlTmgMod[1]) >= DDR667_FREQUENCY) :
             ((MEMORY_BUS_SPEED)(ChnlTmgMod[1]) <= DDR1066_FREQUENCY));
-          MemClkFreq = ChnlTmgMod[1];
+          MemClkFreq = (MEMORY_BUS_SPEED) ChnlTmgMod[1];
         }
       }