sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE
Make it default to 0x400, which is what the touched southbridges use.
Change-Id: I95cb1730d5bf6f596ed1ca8e7dba40b6a9e882fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index db3d92a..9946944 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -47,11 +47,10 @@
* It does not matter where we put the SMBus I/O base, as long as we
* keep it consistent and don't interfere with other devices. Stage2
* will relocate this anyways.
- * Our solution is to have SMB initialization move the I/O to SMBUS_IO_BASE
+ * Our solution is to have SMB initialization move the I/O to CONFIG_FIXED_SMBUS_IO_BASE
* again. But handling static BARs is a generic problem that should be
* solved in the device allocator.
*/
-#define SMBUS_IO_BASE 0x0400
#define SMBUS_SLAVE_ADDR 0x24
#if CONFIG(INTEL_LYNXPOINT_LP)