commit b123e0d3345554d7e93361bb4511a53bc95d41a1
author Idwer Vollering <vidwer@gmail.com> Mon Aug 25 23:59:42 2014 +0200
committer Edward O'Callaghan <eocallaghan@alterapraxis.com> Tue Aug 26 10:08:30 2014 +0200
tree 07f30b084c7b0c187bda8c496abbb05468b035f8
parent 4c8465cfac3a5b4bdc61e0f2f0bfb0b346b03ad2

util/inteltool: fix typo

Change-Id: I8c30742f6cd759dce4c9641edad107d9e3154975
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/6766
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

util/inteltool/inteltool.c

diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c
index c6e2a67..7552dfe 100644
--- a/util/inteltool/inteltool.c
+++ b/util/inteltool/inteltool.c
@@ -203,10 +203,10 @@
 	printf("\n"
 	     "   -v | --version:                   print the version\n"
 	     "   -h | --help:                      print this help\n\n"
-	     "   -g | --gpio:                      dump soutbridge GPIO registers\n"
+	     "   -g | --gpio:                      dump southbridge GPIO registers\n"
 	     "   -G | --gpio-diffs:                show GPIO differences from defaults\n"
-	     "   -r | --rcba:                      dump soutbridge RCBA registers\n"
-	     "   -p | --pmbase:                    dump soutbridge Power Management registers\n\n"
+	     "   -r | --rcba:                      dump southbridge RCBA registers\n"
+	     "   -p | --pmbase:                    dump southbridge Power Management registers\n\n"
 	     "   -m | --mchbar:                    dump northbridge Memory Controller registers\n"
 	     "   -e | --epbar:                     dump northbridge EPBAR registers\n"
 	     "   -d | --dmibar:                    dump northbridge DMIBAR registers\n"