nb/intel/gm45: Use PCI bitwise ops
While we are at it, also reflow a few lines that fit in 96 characters.
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.
Change-Id: Icaca44280acdba099a5e13c5fd91d82c3e002bae
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42189
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 439127d..09df12d 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -50,11 +50,10 @@
if (stepping == STEPPING_B3) {
MCHBAR8(0xffc) |= 1 << 4;
const pci_devfn_t peg = PCI_DEV(0, 1, 0);
+
/* FIXME: proper test? */
- if (pci_read_config8(peg, PCI_CLASS_REVISION) != 0xff) {
- int val = pci_read_config32(peg, 0xfc) | (1 << 15);
- pci_write_config32(peg, 0xfc, val);
- }
+ if (pci_read_config8(peg, PCI_CLASS_REVISION) != 0xff)
+ pci_or_config32(peg, 0xfc, 1 << 15);
}
/* final */