commit afe1fe55eb346cc5bee097dee75f5ccbe3b62df4
author Raul E Rangel <rrangel@chromium.org> Tue May 04 16:48:25 2021 -0600
committer Felix Held <felix-coreboot@felixheld.de> Thu May 06 23:27:50 2021 +0000
tree b7ddf605edc4b6f540824c5e4a5afdd22ee3ca05
parent c8cfe7c8ff875bbb4059d86bf0af70ab8b777ec8

soc/amd/{common/picasso}: Move pci_int.asl

We can share this with cezanne.

BUG=b:184766519
TEST=Build picasso

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: If746d55345f6b7c828376b64adc5532d20413f68
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52916
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/common/acpi/pci_int.asl

diff --git a/src/soc/amd/picasso/acpi/pci_int.asl b/src/soc/amd/common/acpi/pci_int.asl
similarity index 100%
rename from src/soc/amd/picasso/acpi/pci_int.asl
rename to src/soc/amd/common/acpi/pci_int.asl

src/soc/amd/picasso/acpi/soc.asl

diff --git a/src/soc/amd/picasso/acpi/soc.asl b/src/soc/amd/picasso/acpi/soc.asl
index b411c20..e8c78e1 100644
--- a/src/soc/amd/picasso/acpi/soc.asl
+++ b/src/soc/amd/picasso/acpi/soc.asl
@@ -9,7 +9,7 @@
 }
 
 /* Describe PCI INT[A-H] for the Southbridge */
-#include "pci_int.asl"
+#include <soc/amd/common/acpi/pci_int.asl>
 
 /* Describe the devices in the Southbridge */
 #include "sb_fch.asl"