| commit | ae7e793a2071430e882bf94b3ff57a16fd7e154b | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Mon Jun 14 10:57:36 2021 +0200 |
| committer | Patrick Georgi <pgeorgi@google.com> | Wed Jun 16 09:55:40 2021 +0000 |
| tree | bb55e41144e143ec38570ad1c2a21149464969e2 | |
| parent | 02e534d8b2ebe099866ea396feaf0e09dbeefe58 [diff] |
soc/intel/broadwell: Include `pci_irqs.asl` from PCH Move the inclusion of `pci_irqs.asl` into PCH scope in order to allow deduplicating northbridge ACPI code. Change-Id: I541913226b26662f3798ae9c25ab1ac33cf2ed45 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55482 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/soc/intel/broadwell/acpi/hostbridge.asl b/src/soc/intel/broadwell/acpi/hostbridge.asl index cf8a6ce..6235f39 100644 --- a/src/soc/intel/broadwell/acpi/hostbridge.asl +++ b/src/soc/intel/broadwell/acpi/hostbridge.asl
@@ -193,9 +193,6 @@ } } -/* PCI IRQ assignment */ -#include "pci_irqs.asl" - /* Configurable TDP */ #include <northbridge/intel/haswell/acpi/ctdp.asl>
diff --git a/src/soc/intel/broadwell/pch/acpi/pch.asl b/src/soc/intel/broadwell/pch/acpi/pch.asl index 0e90c95..fd23f89 100644 --- a/src/soc/intel/broadwell/pch/acpi/pch.asl +++ b/src/soc/intel/broadwell/pch/acpi/pch.asl
@@ -2,6 +2,9 @@ #include <soc/iomap.h> +/* PCI IRQ assignment */ +#include "pci_irqs.asl" + Scope (\) { // IO-Trap at 0x800. This is the ACPI->SMI communication interface.
diff --git a/src/soc/intel/broadwell/acpi/pci_irqs.asl b/src/soc/intel/broadwell/pch/acpi/pci_irqs.asl similarity index 100% rename from src/soc/intel/broadwell/acpi/pci_irqs.asl rename to src/soc/intel/broadwell/pch/acpi/pci_irqs.asl