commit | ae1ef60dfa304450bacc475cd767ac4a610a76e0 | [log] [tgz] |
---|---|---|
author | Duncan Laurie <dlaurie@chromium.org> | Tue May 28 08:32:21 2013 -0700 |
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | Mon Nov 25 23:48:30 2013 +0100 |
tree | 6028ba70226a3c24838836429d765e6513329ffb | |
parent | 116aa3a1900dae2beb56f381e91c9890c1e8ca30 [diff] |
falco: Update DIMM SPD table RAM_ID indices have been changed and settled on a 2GB config that will be the same DRAM chips but only used in one channel. Change-Id: I444e655883ae045622ab3dfb964da4d7f86e1c0d Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/56810 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4198 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>