soc/intel: Introduce ioapic_get_sci_pin()
According to ACPI Release 6.5 systems supporting PIC (i8259)
interrupt mechanism need to report IRQ vector for the SCI_INT
field. In PIC mode only IRQ0..15 are allowed hardware vectors.
This change should cover section 5.2.9 to not pass SCI_INT
larger than IRQ15. Section 5.2.15.5 needs follow-up work.
Care should be taken that ioapic_get_sci_pin() is called
after platform code has potentially changed the routing
from the default.
It appears touched all platforms except siemens/mc_aplX
currently program SCI as IRQ9.
Change-Id: I723c207f1dcbba5e6fc0452fe1dbd087fad290ee
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index 2540929..a2865cb 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -17,6 +17,7 @@
#include <acpi/acpi_ivrs.h>
#include <acpi/acpigen.h>
#include <arch/hpet.h>
+#include <arch/smp/mpspec.h>
#include <cbfs.h>
#include <cbmem.h>
#include <commonlib/helpers.h>
@@ -225,6 +226,24 @@
}
#endif
+u16 acpi_sci_int(void)
+{
+#if ENV_X86
+ u8 gsi, irq, flags;
+
+ ioapic_get_sci_pin(&gsi, &irq, &flags);
+
+ /* ACPI Release 6.5, 5.2.9 and 5.2.15.5. */
+ if (!CONFIG(ACPI_HAVE_PCAT_8259))
+ return gsi;
+
+ assert(irq < 16);
+ return irq;
+#else
+ return 0;
+#endif
+}
+
int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
u8 bus, u8 source, u32 gsirq, u16 flags)
{
@@ -238,6 +257,25 @@
return irqoverride->length;
}
+int acpi_create_madt_sci_override(acpi_madt_irqoverride_t *irqoverride)
+{
+ u8 gsi, irq, flags;
+
+ ioapic_get_sci_pin(&gsi, &irq, &flags);
+
+ if (!CONFIG(ACPI_HAVE_PCAT_8259))
+ irq = gsi;
+
+ irqoverride->type = IRQ_SOURCE_OVERRIDE; /* Interrupt source override */
+ irqoverride->length = sizeof(acpi_madt_irqoverride_t);
+ irqoverride->bus = MP_BUS_ISA;
+ irqoverride->source = irq;
+ irqoverride->gsirq = gsi;
+ irqoverride->flags = flags;
+
+ return irqoverride->length;
+}
+
static int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu,
u16 flags, u8 lint)
{
diff --git a/src/arch/x86/include/arch/ioapic.h b/src/arch/x86/include/arch/ioapic.h
index 6c5282b..9dc2339 100644
--- a/src/arch/x86/include/arch/ioapic.h
+++ b/src/arch/x86/include/arch/ioapic.h
@@ -22,6 +22,8 @@
void register_new_ioapic_gsi0(void *ioapic_base);
void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb);
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags);
#endif
#endif
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index 58db58c..2c8f2ef 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -1338,12 +1338,15 @@
int acpi_create_madt_ioapic_from_hw(acpi_madt_ioapic_t *ioapic, u32 addr);
int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
u8 bus, u8 source, u32 gsirq, u16 flags);
+int acpi_create_madt_sci_override(acpi_madt_irqoverride_t *irqoverride);
unsigned long acpi_create_madt_one_lapic(unsigned long current, u32 cpu, u32 apic);
unsigned long acpi_create_madt_lapics_with_nmis(unsigned long current);
unsigned long acpi_create_madt_lapic_nmis(unsigned long current);
+u16 acpi_sci_int(void);
+
int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic);
int acpi_create_srat_x2apic(acpi_srat_x2apic_t *x2apic, u32 node, u32 apic);
int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index 1c6023d..dce55af 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -10,7 +10,6 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/turbo.h>
-#include <soc/acpi.h>
#include <soc/iomap.h>
#include <soc/irq.h>
#include <soc/msr.h>
@@ -52,14 +51,21 @@
}
};
-int acpi_sci_irq(void)
+static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
+{
+ if (sci_irq >= 20)
+ return MP_IRQ_POLARITY_LOW;
+ else
+ return MP_IRQ_POLARITY_HIGH;
+}
+
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
+ int sci_irq = ACPI_SCI_IRQ;
int scis;
- static int sci_irq;
-
- if (sci_irq)
- return sci_irq;
/* Determine how SCI is routed. */
scis = read32(actl) & SCIS_MASK;
@@ -76,13 +82,15 @@
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
- sci_irq = 9;
+ printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
- return sci_irq;
+ *gsi = sci_irq;
+ *irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
+
+ printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
static acpi_tstate_t soc_tss_table[] = {
@@ -280,33 +288,14 @@
acpigen_write_processor_cnot(pattrs->num_cpus);
}
-static unsigned long acpi_madt_irq_overrides(unsigned long current)
-{
- int sci_irq = acpi_sci_irq();
- acpi_madt_irqoverride_t *irqovr;
- uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
-
- /* INT_SRC_OVR */
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
- if (sci_irq >= 20)
- sci_flags |= MP_IRQ_POLARITY_LOW;
- else
- sci_flags |= MP_IRQ_POLARITY_HIGH;
-
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
-
- return current;
-}
-
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
- current = acpi_madt_irq_overrides(current);
+ /* INT_SRC_OVR */
+ current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_sci_override((void *)current);
return current;
}
diff --git a/src/soc/intel/baytrail/fadt.c b/src/soc/intel/baytrail/fadt.c
index 64154db..a76d161 100644
--- a/src/soc/intel/baytrail/fadt.c
+++ b/src/soc/intel/baytrail/fadt.c
@@ -11,7 +11,7 @@
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
- fadt->sci_int = acpi_sci_irq();
+ fadt->sci_int = acpi_sci_int();
if (permanent_smi_handler()) {
fadt->smi_cmd = APM_CNT;
diff --git a/src/soc/intel/baytrail/include/soc/acpi.h b/src/soc/intel/baytrail/include/soc/acpi.h
index b747db7..db07de1 100644
--- a/src/soc/intel/baytrail/include/soc/acpi.h
+++ b/src/soc/intel/baytrail/include/soc/acpi.h
@@ -5,6 +5,4 @@
#include <acpi/acpi.h>
-int acpi_sci_irq(void);
-
#endif /* _BAYTRAIL_ACPI_H_ */
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 1927421..0ea54b8 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -81,14 +81,21 @@
gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN;
}
-int acpi_sci_irq(void)
+static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
+{
+ if (sci_irq >= 20)
+ return MP_IRQ_POLARITY_LOW;
+ else
+ return MP_IRQ_POLARITY_HIGH;
+}
+
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
+ int sci_irq = ACPI_SCI_IRQ;
int scis;
- static int sci_irq;
-
- if (sci_irq)
- return sci_irq;
/* Determine how SCI is routed. */
scis = read32(actl) & SCIS_MASK;
@@ -105,13 +112,15 @@
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
- sci_irq = 9;
+ printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
- return sci_irq;
+ *gsi = sci_irq;
+ *irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
+
+ printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
static acpi_tstate_t soc_tss_table[] = {
@@ -309,33 +318,14 @@
acpigen_write_processor_cnot(pattrs->num_cpus);
}
-static unsigned long acpi_madt_irq_overrides(unsigned long current)
-{
- int sci_irq = acpi_sci_irq();
- acpi_madt_irqoverride_t *irqovr;
- uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
-
- /* INT_SRC_OVR */
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
- if (sci_irq >= 20)
- sci_flags |= MP_IRQ_POLARITY_LOW;
- else
- sci_flags |= MP_IRQ_POLARITY_HIGH;
-
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
-
- return current;
-}
-
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
- current = acpi_madt_irq_overrides(current);
+ /* INT_SRC_OVR */
+ current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_sci_override((void *)current);
return current;
}
diff --git a/src/soc/intel/braswell/fadt.c b/src/soc/intel/braswell/fadt.c
index 64154db..a76d161 100644
--- a/src/soc/intel/braswell/fadt.c
+++ b/src/soc/intel/braswell/fadt.c
@@ -11,7 +11,7 @@
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
- fadt->sci_int = acpi_sci_irq();
+ fadt->sci_int = acpi_sci_int();
if (permanent_smi_handler()) {
fadt->smi_cmd = APM_CNT;
diff --git a/src/soc/intel/braswell/include/soc/acpi.h b/src/soc/intel/braswell/include/soc/acpi.h
index ccb48eb..fa4c804 100644
--- a/src/soc/intel/braswell/include/soc/acpi.h
+++ b/src/soc/intel/braswell/include/soc/acpi.h
@@ -5,7 +5,6 @@
#include <acpi/acpi.h>
-int acpi_sci_irq(void);
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
unsigned long southcluster_write_acpi_tables(const struct device *device,
unsigned long current, struct acpi_rsdp *rsdp);
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index cfc15a8..50854fa 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -24,9 +24,11 @@
#define CPUID_6_EAX_ISST (1 << 7)
-static int acpi_sci_irq(void)
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
- int sci_irq = 9;
+ int sci_irq = ACPI_SCI_IRQ;
uint32_t scis;
scis = soc_read_sci_irq_select();
@@ -47,31 +49,17 @@
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
- sci_irq = 9;
+ printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
- return sci_irq;
+ *gsi = sci_irq;
+ *irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
+
+ printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
-static unsigned long acpi_madt_irq_overrides(unsigned long current)
-{
- int sci = acpi_sci_irq();
- uint16_t flags = MP_IRQ_TRIGGER_LEVEL;
-
- /* INT_SRC_OVR */
- current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
-
- flags |= soc_madt_sci_irq_polarity(sci);
-
- /* SCI */
- current +=
- acpi_create_madt_irqoverride((void *)current, 0, sci, sci, flags);
-
- return current;
-}
static const uintptr_t default_ioapic_bases[] = { IO_APIC_ADDR };
@@ -95,14 +83,18 @@
for (int i = 0; i < ioapic_entries; i++)
current += acpi_create_madt_ioapic_from_hw((void *)current, ioapic_table[i]);
- return acpi_madt_irq_overrides(current);
+ /* INT_SRC_OVR */
+ current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_sci_override((void *)current);
+
+ return current;
}
void acpi_fill_fadt(acpi_fadt_t *fadt)
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
- fadt->sci_int = acpi_sci_irq();
+ fadt->sci_int = acpi_sci_int();
if (permanent_smi_handler()) {
fadt->smi_cmd = APM_CNT;