- Minor bugfixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/devices/hypertransport.c b/src/devices/hypertransport.c
index 326f343..ba57bc8 100644
--- a/src/devices/hypertransport.c
+++ b/src/devices/hypertransport.c
@@ -14,6 +14,7 @@
first = *old_devices;
last = first;
while(last && last->sibling &&
+ (last->sibling->path.type == DEVICE_PATH_PCI) &&
(last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) {
last = last->sibling;
}
diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index 031d855..ffa4207 100644
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -475,6 +475,10 @@
{
struct device *dev = 0;
for(; *list; list = &(*list)->sibling) {
+ if ((*list)->path.type != DEVICE_PATH_PCI) {
+ printk_err("child %s not a pci device\n", dev_path(*list));
+ continue;
+ }
if ((*list)->path.u.pci.devfn == devfn) {
/* Unlink from the list */
dev = *list;
diff --git a/src/mainboard/amd/solo/Config.lb b/src/mainboard/amd/solo/Config.lb
index 8a43951..70082ed 100644
--- a/src/mainboard/amd/solo/Config.lb
+++ b/src/mainboard/amd/solo/Config.lb
@@ -228,6 +228,10 @@
pci 0:18.1
pci 0:18.2
pci 0:18.3
+ southbridge amd/amd8151 "amd8151" link 0
+ pci 0:0.0
+ pci 0:1.0
+ end
southbridge amd/amd8111 "amd8111" link 0
pci 0:0.0
pci 0:1.0 on
@@ -256,10 +260,6 @@
register "lpt" = "{1}"
end
end
- southbridge amd/amd8151 "amd8151" link 1
- pci 0:0.0
- pci 0:1.0
- end
end
cpu k8 "cpu0"
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 13845c5..aed3855 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -166,7 +166,7 @@
for(link = 0; link < dev->links; link++) {
uint32_t link_type;
uint32_t busses, config_busses;
- unsigned free_reg, config_reg;
+ unsigned free_reg, config_reg, other_reg;
dev->link[link].cap = 0x80 + (link *0x20);
do {
link_type = pci_read_config32(dev, dev->link[link].cap + 0x18);
@@ -455,7 +455,13 @@
unsigned int amdk8_scan_root_bus(device_t root, unsigned int max)
{
- return pci_scan_bus(&root->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
+ unsigned reg;
+ max = pci_scan_bus(&root->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
+ /* Unmap all of the other pci busses */
+ for(reg = 0xe0; reg <= 0xec; reg += 4) {
+ f1_write_config32(reg, 0);
+ }
+ return max;
}
static struct device_operations northbridge_operations = {