tree cc78ea24932c75081f09f975dc8b3c55eabcbb57
parent e66fcb87fed9b25be5e35eef05133ef7596edd46
author Chris.Wang <chris.wang@amd.corp-partner.google.com> 1672218468 +0800
committer Martin L Roth <gaumless@gmail.com> 1672816510 +0000

soc/amd/mendocino: Hook up UPD dxio_tx_vboost_enable for PCIe optimization

Add the UPD dxio_tx_vboost_enable for PCIe optimization.
It will impact the PCIe signal integrity, need to double-confirm
the SI result after enabling this setting.

BUG=b:259622787
BRANCH=none
TEST=confirm the setting has been set correspondingly with checking
     the FSP log.

Signed-off-by: Chris.Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: I05ae5b3091219e0cb1fe469c929fad6a725db678
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71562
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>