| commit | aa7cf5597b0f4d59c5d7fe42a8b5130852056bff | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Sun Jun 03 10:44:55 2018 +0200 |
| committer | Arthur Heymans <arthur@aheymans.xyz> | Tue Jun 05 07:49:09 2018 +0000 |
| tree | e7bcbf378dcca3971be89d8e916b1e111cc4a089 | |
| parent | 2dcc3a5c68b4bacbe96c1543cc20e5a3425889fb [diff] [blame] |
nb/intel/pineview: Switch to POSTCAR_STAGE Change-Id: If23925e2837645c974e4094e7e2d90e700d3d9e8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/26786 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc index a4c08c8..d7936c1 100644 --- a/src/northbridge/intel/pineview/Makefile.inc +++ b/src/northbridge/intel/pineview/Makefile.inc
@@ -25,4 +25,6 @@ romstage-y += raminit.c romstage-y += early_init.c +postcar-y += ram_calc.c + endif