commit | aa6a8fb9198acfe22fec944bc9484a800d689ff4 | [log] [tgz] |
---|---|---|
author | Praveen Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com> | Tue Oct 29 14:47:11 2019 +0800 |
committer | Patrick Georgi <pgeorgi@google.com> | Tue Mar 10 20:42:14 2020 +0000 |
tree | a0bfa61c4d347cb97b019d2cc2de897990e81fb9 | |
parent | b7731574f498dc8fd81c258b248ddfeda3eab5b5 [diff] [blame] |
mb/intel/{saddlebrook,kunimitsu}: Add macro for SaGv config Change-Id: Ia31da9997ba46c15cd385bf55e009cf299848b64 Signed-off-by: Praveen Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36423 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 670a474..ea35785 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -34,7 +34,7 @@ register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" - register "SaGv" = "3" + register "SaGv" = "SaGv_Enabled" register "PmTimerDisabled" = "1" register "pirqa_routing" = "PCH_IRQ11"