- Add a test to make certain romcc is properly allocating registers.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/util/romcc/Makefile b/util/romcc/Makefile
index 51e5fa8..eb84cee 100644
--- a/util/romcc/Makefile
+++ b/util/romcc/Makefile
@@ -34,6 +34,7 @@
simple_test17.c \
simple_test18.c \
simple_test19.c \
+ simple_test20.c \
raminit_test.c \
raminit_test2.c
diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c
index f138195..f937e69 100644
--- a/util/romcc/romcc.c
+++ b/util/romcc/romcc.c
@@ -10195,6 +10195,14 @@
}
do_triple_set(&live, *expr, 0);
}
+ expr = triple_lhs(state, ptr, 0);
+ for(;expr; expr = triple_lhs(state, ptr, expr)) {
+ /* If the triple is not a definition skip it. */
+ if (!*expr || !triple_is_def(state, *expr)) {
+ continue;
+ }
+ do_triple_set(&live, *expr, 0);
+ }
}
/* Free live */
@@ -11017,21 +11025,58 @@
cgdebug_printf(" %s\n", arch_reg_str(range->color));
}
+static void verify_colors(struct compile_state *state, struct reg_state *rstate)
+{
+ struct live_range *lr;
+ struct live_range_edge *edge;
+ struct triple *ins, *first;
+ char used[MAX_REGISTERS];
+ first = RHS(state->main_function, 0);
+ ins = first;
+ do {
+ if (triple_is_def(state, ins)) {
+ if ((ins->id < 0) || (ins->id > rstate->ranges)) {
+ internal_error(state, ins,
+ "triple without a live range");
+ }
+ lr = &rstate->lr[ins->id];
+ if (lr->color == REG_UNSET) {
+ internal_error(state, ins,
+ "triple without a color");
+ }
+ /* Find the registers used by the edges */
+ memset(used, 0, sizeof(used));
+ for(edge = lr->edges; edge; edge = edge->next) {
+ if (edge->node->color == REG_UNSET) {
+ internal_error(state, 0,
+ "live range without a color");
+ }
+ reg_fill_used(state, used, edge->node->color);
+ }
+ if (used[lr->color]) {
+ internal_error(state, ins,
+ "triple with already used color");
+ }
+ }
+ ins = ins->next;
+ } while(ins != first);
+}
+
static void color_triples(struct compile_state *state, struct reg_state *rstate)
{
struct live_range *lr;
- struct triple *first, *triple;
+ struct triple *first, *ins;
first = RHS(state->main_function, 0);
- triple = first;
+ ins = first;
do {
- if ((triple->id < 0) || (triple->id > rstate->ranges)) {
- internal_error(state, triple,
+ if ((ins->id < 0) || (ins->id > rstate->ranges)) {
+ internal_error(state, ins,
"triple without a live range");
}
- lr = &rstate->lr[triple->id];
- triple->id = MK_REG_ID(lr->color, 0);
- triple = triple->next;
- } while (triple != first);
+ lr = &rstate->lr[ins->id];
+ ins->id = MK_REG_ID(lr->color, 0);
+ ins = ins->next;
+ } while (ins != first);
}
static void print_interference_block(
@@ -11299,6 +11344,9 @@
/* Color the live_ranges */
color_graph(state, &rstate);
+ /* Verify the graph was properly colored */
+ verify_colors(state, &rstate);
+
/* Move the colors from the graph to the triples */
color_triples(state, &rstate);
diff --git a/util/romcc/tests/simple_test20.c b/util/romcc/tests/simple_test20.c
new file mode 100644
index 0000000..71af19c
--- /dev/null
+++ b/util/romcc/tests/simple_test20.c
@@ -0,0 +1,148 @@
+static void outb(unsigned char value, unsigned short port)
+{
+ __builtin_outb(value, port);
+}
+
+static void outl(unsigned int value, unsigned short port)
+{
+ __builtin_outl(value, port);
+}
+
+static unsigned char inb(unsigned short port)
+{
+ return __builtin_inb(port);
+}
+
+static unsigned char inl(unsigned short port)
+{
+ return __builtin_inl(port);
+}
+
+static unsigned int config_cmd(unsigned char bus, unsigned devfn, unsigned where)
+{
+ return 0x80000000 | (bus << 16) | (devfn << 8) | (where & ~3);
+}
+
+static unsigned int pcibios_read_config_dword(
+ unsigned char bus, unsigned devfn, unsigned where)
+{
+ outl(config_cmd(bus, devfn, where), 0xCF8);
+ return inl(0xCFC);
+}
+
+
+
+/* Base Address */
+#ifndef TTYS0_BASE
+#define TTYS0_BASE 0x3f8
+#endif
+
+#ifndef TTYS0_BAUD
+#define TTYS0_BAUD 115200
+#endif
+
+#if ((115200%TTYS0_BAUD) != 0)
+#error Bad ttys0 baud rate
+#endif
+
+#define TTYS0_DIV (115200/TTYS0_BAUD)
+
+/* Line Control Settings */
+#ifndef TTYS0_LCS
+/* Set 8bit, 1 stop bit, no parity */
+#define TTYS0_LCS 0x3
+#endif
+
+#define UART_LCS TTYS0_LCS
+
+/* Data */
+#define UART_RBR 0x00
+#define UART_TBR 0x00
+
+/* Control */
+#define UART_IER 0x01
+#define UART_IIR 0x02
+#define UART_FCR 0x02
+#define UART_LCR 0x03
+#define UART_MCR 0x04
+#define UART_DLL 0x00
+#define UART_DLM 0x01
+
+/* Status */
+#define UART_LSR 0x05
+#define UART_MSR 0x06
+#define UART_SCR 0x07
+
+int uart_can_tx_byte(void)
+{
+ return inb(TTYS0_BASE + UART_LSR) & 0x20;
+}
+
+void uart_wait_to_tx_byte(void)
+{
+ while(!uart_can_tx_byte())
+ ;
+}
+
+void uart_wait_until_sent(void)
+{
+ while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ ;
+}
+
+void uart_tx_byte(unsigned char data)
+{
+ uart_wait_to_tx_byte();
+ outb(data, TTYS0_BASE + UART_TBR);
+ /* Make certain the data clears the fifos */
+ uart_wait_until_sent();
+}
+
+void uart_init(void)
+{
+ /* disable interrupts */
+ outb(0x0, TTYS0_BASE + UART_IER);
+ /* enable fifo's */
+ outb(0x01, TTYS0_BASE + UART_FCR);
+ /* Set Baud Rate Divisor to 12 ==> 115200 Baud */
+ outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
+ outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, TTYS0_BASE + UART_LCR);
+}
+
+void __console_tx_char(unsigned char byte)
+{
+ uart_tx_byte(byte);
+}
+void __console_tx_nibble(unsigned nibble)
+{
+ unsigned char digit;
+ digit = nibble + '0';
+ if (digit > '9') {
+ digit += 39;
+ }
+ __console_tx_char(digit);
+}
+
+void __console_tx_hex32(unsigned int value)
+{
+ __console_tx_nibble((value >> 28) & 0x0f);
+ __console_tx_nibble((value >> 24) & 0x0f);
+ __console_tx_nibble((value >> 20) & 0x0f);
+ __console_tx_nibble((value >> 16) & 0x0f);
+ __console_tx_nibble((value >> 12) & 0x0f);
+ __console_tx_nibble((value >> 8) & 0x0f);
+ __console_tx_nibble((value >> 4) & 0x0f);
+ __console_tx_nibble(value & 0x0f);
+}
+
+void print_debug_hex32(unsigned int value) { __console_tx_hex32(value); }
+
+
+void main(void)
+{
+ unsigned long htic;
+ htic = pcibios_read_config_dword(0, 0xc0, 0x6c);
+ print_debug_hex32(htic);
+}