mb/google/brya: move SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES to common
ADL support USB4/TBT. Select it will reserve PCI buses and hotplug mem
and prefetch mem.
BUG=b:206739931
TEST=build PASS.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I1171981c1318c2ecb65ba7959c4de9b5e179514e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60885
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 5f1559a..16dd943 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -35,6 +35,7 @@
select PMC_IPC_ACPI_INTERFACE
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_CSE_LITE_SKU
+ select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES if SOC_INTEL_ALDERLAKE_PCH_P
config BOARD_GOOGLE_BASEBOARD_BRYA
def_bool n