diff --git a/src/southbridge/intel/bd82x6x/pci.c b/src/southbridge/intel/bd82x6x/pci.c
index 6391de4..a222893 100644
--- a/src/southbridge/intel/bd82x6x/pci.c
+++ b/src/southbridge/intel/bd82x6x/pci.c
@@ -57,34 +57,6 @@
 	pci_write_config16(dev, SECSTS, reg16);
 }
 
-static void ich_pci_dev_enable_resources(struct device *dev)
-{
-	uint16_t command;
-
-	command = pci_read_config16(dev, PCI_COMMAND);
-	command |= dev->command;
-	printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
-	pci_write_config16(dev, PCI_COMMAND, command);
-}
-
-static void ich_pci_bus_enable_resources(struct device *dev)
-{
-	uint16_t ctrl;
-	/* enable IO in command register if there is VGA card
-	 * connected with (even it does not claim IO resource)
-	 */
-	if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
-		dev->command |= PCI_COMMAND_IO;
-	ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
-	ctrl |= dev->link_list->bridge_ctrl;
-	ctrl |= (PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR); /* error check */
-	printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
-	pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
-
-	/* This is the reason we need our own pci_bus_enable_resources */
-	ich_pci_dev_enable_resources(dev);
-}
-
 static struct pci_operations pci_ops = {
 	.set_subsystem = pci_dev_set_subsystem,
 };
@@ -92,7 +64,7 @@
 static struct device_operations device_ops = {
 	.read_resources		= pci_bus_read_resources,
 	.set_resources		= pci_dev_set_resources,
-	.enable_resources	= ich_pci_bus_enable_resources,
+	.enable_resources	= pci_bus_enable_resources,
 	.init			= pci_init,
 	.scan_bus		= pci_scan_bridge,
 	.ops_pci		= &pci_ops,