CBMEM: Add config CBMEM_TOP_BACKUP
AGESA and binaryPI boards have no easy way to determine correct
cbmem_top() location early enough when GFXUMA is enabled, so they
will use these functions with EARLY_CBMEM_INIT as well.
At the end of AmdInitPost() the decisions of UMA base and size
have not been written to hardware yet. The decisions are stored
inside AGESA heap object we cannot locate from coreboot proper
until after AmdInitEnv().
Modify code such that weak backup functions are only defined
for LATE_CBMEM_INIT; they are somewhat troublesome to handle.
Change-Id: Ifef4f75b36bc6dee6cd56d1d9164281d9b2a4f2a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19306
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 0fe25c1..21ca097 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -145,11 +145,12 @@
#endif /* ENV_RAMSTAGE */
-/* These are for compatibility with old boards only. Any new chipset and board
- * must implement cbmem_top() for both romstage and ramstage to support
- * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE.
+/* Any new chipset and board must implement cbmem_top() for both
+ * romstage and ramstage to support early features like COLLECT_TIMESTAMPS
+ * and CBMEM_CONSOLE. Sometimes it is necessary to have cbmem_top()
+ * value stored in nvram to enable early recovery on S3 path.
*/
-#if IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
+#if IS_ENABLED(CONFIG_ARCH_X86)
/* Note that many of the current providers of get_top_of_ram() conditionally
* return 0 when the sleep type is non S3. i.e. cold and warm boots would
* return 0 from get_top_of_ram(). */