diff --git a/src/superio/ite/Makefile.mk b/src/superio/ite/Makefile.mk
index b6d0199..d44ade4 100644
--- a/src/superio/ite/Makefile.mk
+++ b/src/superio/ite/Makefile.mk
@@ -7,6 +7,9 @@
 ## include generic ite environment controller driver
 ramstage-$(CONFIG_SUPERIO_ITE_ENV_CTRL) += common/env_ctrl.c
 
+## include generic ite driver to smm to control S3-relevant functions
+smm-$(CONFIG_SUPERIO_ITE_COMMON_PRE_RAM) += common/early_serial.c
+
 subdirs-y += it8528e
 subdirs-y += it8613e
 subdirs-y += it8623e
diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c
index 552f110..b8a6ba5 100644
--- a/src/superio/ite/common/early_serial.c
+++ b/src/superio/ite/common/early_serial.c
@@ -75,6 +75,7 @@
  *
  * LDN 7, reg 0x2a - needed for S3, or memory power will be cut off
  * this was documented only in IT8712F_V0.9.2!
+ * Also documented in IT8728F_V0.4.2 and IT8772E_V0.4
  *
  * Enable 3VSBSW#. (For System Suspend-to-RAM)
  * 0: 3VSBSW# will be always inactive.
@@ -85,13 +86,16 @@
  * and pass: GPIO_DEV
  */
 
-void ite_enable_3vsbsw(pnp_devfn_t dev)
+void ite_set_3vsbsw(pnp_devfn_t dev, bool enable)
 {
 	u8 tmp;
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
 	tmp = pnp_read_config(dev, ITE_CONFIG_REG_MFC);
-	tmp |= 0x80;
+	if (enable)
+		tmp |= 0x80;
+	else
+		tmp &= ~0x80;
 	pnp_write_config(dev, ITE_CONFIG_REG_MFC, tmp);
 	pnp_exit_conf_state(dev);
 }
diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h
index 19ade4b..1a147be 100644
--- a/src/superio/ite/common/ite.h
+++ b/src/superio/ite/common/ite.h
@@ -4,6 +4,7 @@
 #define SUPERIO_ITE_COMMON_PRE_RAM_H
 
 #include <device/pnp_type.h>
+#include <stdbool.h>
 #include <stdint.h>
 
 #define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */
@@ -14,11 +15,15 @@
 
 /* Some boards need to init wdt+gpio's very early */
 void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value);
-void ite_enable_3vsbsw(pnp_devfn_t dev);
+void ite_set_3vsbsw(pnp_devfn_t dev, bool enable);
 void ite_delay_pwrgd3(pnp_devfn_t dev);
 void ite_kill_watchdog(pnp_devfn_t dev);
 void ite_ac_resume_southbridge(pnp_devfn_t dev);
 
+/* Alias for backwards compatibility */
+static inline void ite_enable_3vsbsw(pnp_devfn_t dev)  { ite_set_3vsbsw(dev, true); }
+static inline void ite_disable_3vsbsw(pnp_devfn_t dev) { ite_set_3vsbsw(dev, false); }
+
 void pnp_enter_conf_state(pnp_devfn_t dev);
 void pnp_exit_conf_state(pnp_devfn_t dev);