commit | a7c410b28602e337a85466429540663a7f3a219a | [log] [tgz] |
---|---|---|
author | Felix Held <felix-coreboot@felixheld.de> | Tue May 25 20:51:35 2021 +0200 |
committer | Felix Held <felix-coreboot@felixheld.de> | Thu May 27 15:39:17 2021 +0000 |
tree | 26962759d6e17a2e12006ba9bcda9197ca23f4ee | |
parent | 9a24c3f80d477f304a966094ded1ccde4155375c [diff] |
mb/google/guybrush: set PSPP policy to powersave BUG=b:188793754 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I262c4c3ae90d8d12fdfe71a3620739070a444a55 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54931 Reviewed-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index 3454001..18e7012 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -52,6 +52,8 @@ register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | GPIO_I2C2_SCL | GPIO_I2C3_SCL" + register "pspp_policy" = "DXIO_PSPP_POWERSAVE" + register "usb_phy_custom" = "1" register "usb_phy" = "{ .Usb2PhyPort[0] = {