HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/Kconfig b/src/Kconfig
index 675446b..99aabdf 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -184,10 +184,6 @@
bool
default n
-config HAVE_MOVNTI
- bool
- default n
-
config HAVE_OPTION_TABLE
bool
default y
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 3c4c419..c0cf768 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -32,14 +32,26 @@
This option is used to enable certain functions to make coreboot
work correctly on symmetric multi processor (SMP) systems.
-# Set MMX and SSE in socket or model if the CPU has them.
-# If all CPUs for the socket have MMX or SSE, set them there.
-# These options are only needed for boards compiled with romcc.
config MMX
bool
+ help
+ Select MMX in your socket or model Kconfig if your CPU has MMX
+ streaming SIMD instructions. ROMCC can build more efficient
+ code if it can spill to MMX registers.
config SSE
bool
+ help
+ Select SSE in your socket or model Kconfig if your CPU has SSE
+ streaming SIMD instructions. ROMCC can build more efficient
+ code if it can spill to SSE (aka XMM) registers.
+
+config SSE2
+ bool
+ help
+ Select SSE2 in your socket or model Kconfig if your CPU has SSE2
+ streaming SIMD instructions. Some parts of coreboot can be built
+ with more efficient code if SSE2 instructions are available.
config VAR_MTRR_HOLE
bool
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 974eed6..3882861 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -1,9 +1,9 @@
config CPU_AMD_MODEL_10XXX
bool
- select HAVE_MOVNTI
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select SSE
+ select SSE2
select HAVE_INIT_TIMER
config CPU_ADDR_BITS
diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig
index 83a7fe1..e175637 100644
--- a/src/cpu/amd/model_fxx/Kconfig
+++ b/src/cpu/amd/model_fxx/Kconfig
@@ -1,9 +1,10 @@
config CPU_AMD_MODEL_FXX
bool
- select HAVE_MOVNTI
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
+ select MMX
select SSE
+ select SSE2
select HAVE_INIT_TIMER
config CPU_ADDR_BITS
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index cd6483a..4ddba39 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_CORE2
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig
index 187bcd0..0342816 100644
--- a/src/cpu/intel/model_106cx/Kconfig
+++ b/src/cpu/intel/model_106cx/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_ATOM_230
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig
index cbc5797..eda7473 100644
--- a/src/cpu/intel/model_6ex/Kconfig
+++ b/src/cpu/intel/model_6ex/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_CORE
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index 484114c..4ddba39 100644
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -1 +1,4 @@
-# select HAVE_MOVNTI
+config CPU_INTEL_CORE2
+ bool
+ select SMP
+ select SSE2
diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig
index fe68d96..bf26cfe 100644
--- a/src/cpu/intel/model_f0x/Kconfig
+++ b/src/cpu/intel/model_f0x/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_MODEL_F0X
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig
index 89d382f..328930c 100644
--- a/src/cpu/intel/model_f1x/Kconfig
+++ b/src/cpu/intel/model_f1x/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_MODEL_F1X
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig
index c92cc8c..1672fda 100644
--- a/src/cpu/intel/model_f2x/Kconfig
+++ b/src/cpu/intel/model_f2x/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_MODEL_F2X
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index c9cf932..1a2fa36 100644
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_MODEL_F3X
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig
index 5c46434..e765e33 100644
--- a/src/cpu/intel/model_f4x/Kconfig
+++ b/src/cpu/intel/model_f4x/Kconfig
@@ -1,4 +1,4 @@
config CPU_INTEL_MODEL_F4X
bool
select SMP
- select HAVE_MOVNTI
+ select SSE2
diff --git a/src/cpu/via/model_c7/Kconfig b/src/cpu/via/model_c7/Kconfig
index 8a2fe88..c9146ad 100644
--- a/src/cpu/via/model_c7/Kconfig
+++ b/src/cpu/via/model_c7/Kconfig
@@ -1,3 +1,4 @@
config CPU_VIA_C7
bool
select UDELAY_TSC
+ select SSE2
diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
index 4f00030..6268aaa 100644
--- a/src/lib/ramtest.c
+++ b/src/lib/ramtest.c
@@ -1,6 +1,8 @@
static void write_phys(unsigned long addr, unsigned long value)
{
-#if CONFIG_HAVE_MOVNTI
+ // Assembler in lib/ is very ugly. But we properly guarded
+ // it so let's obey this one for now
+#if CONFIG_SSE2
asm volatile(
"movnti %1, (%0)"
: /* outputs */
@@ -50,6 +52,10 @@
}
write_phys(addr, addr);
};
+#if CONFIG_SSE2
+ // Needed for movnti
+ asm volatile ("sfence" ::: "memory");
+#endif
/* Display final address */
#if CONFIG_USE_PRINTK_IN_CAR
printk_debug("%08lx\r\nDRAM filled\r\n", addr);