| commit | a5b06b9b578f48b30502bba04841f06cf9ce9e4a | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Fri Jan 13 09:33:03 2023 +0100 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Thu Oct 05 12:50:43 2023 +0000 |
| tree | 1faeb24e3bfa252e5a1098d34f3547c5ee8251f4 | |
| parent | f151cd2859b70722de3b17ee56929fc896cd22a1 [diff] |
cpu/intel/socket_BGA956: Double DCACHE_RAM_SIZE to 64 kB This fixes building lenovo/x200 with VBOOT. All supported CPUs have enough L2 cache to support this. Change-Id: Ifd6a16ce36c86349955cd7b7ddb3f74a19c17c4d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71905 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index b56fb88..7c42722 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig
@@ -10,7 +10,7 @@ config DCACHE_RAM_SIZE hex - default 0x8000 + default 0x10000 config DCACHE_BSP_STACK_SIZE hex