commit a5aad2ed68690d748c650f69a2e39f91a7b02608
author Elyes HAOUAS <ehaouas@noos.fr> Mon Sep 19 09:47:16 2016 -0600
committer Patrick Georgi <pgeorgi@google.com> Tue Sep 20 21:55:12 2016 +0200
tree 7ad419bc13bcf13e546481558aa1a4c923821c07
parent 531b87ac4e8038aedf9c44c29fe2c1fc31adb346

src/mainboard/lenovo-winent: Add space around operators

Change-Id: Iab2a879ebdea9d93ef5eb7e3abf875036c1e1cb4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16641
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/mainboard/supermicro/h8qme_fam10/romstage.c

diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 4661f45..f82ddd1 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -77,19 +77,19 @@
 	uint32_t dword;
 	uint8_t byte;
 	enable_smbus();
-//	smbusx_write_byte(1, (0x58>>1), 0, 0x80); /* select bank0 */
-	smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
+//	smbusx_write_byte(1, (0x58 >> 1), 0, 0x80); /* select bank0 */
+	smbusx_write_byte(1, (0x58 >> 1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
 
 	byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);
 	byte |= 0x20;
 	pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);
 
 	dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
-	dword |= (1<<0);
+	dword |= (1 << 0);
 	pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
 
 	dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
-	dword |= (1<<16);
+	dword |= (1 << 16);
 	pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
 }
 
@@ -260,7 +260,7 @@
 	post_code(0x3A);
 
 	/* show final fid and vid */
-	msr=rdmsr(0xc0010071);
+	msr = rdmsr(0xc0010071);
 	printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);
 #endif