arch/x86: Add API to check if cache sets are power-of-two
Introduce a function to determine whether the number of cache sets is
a power of two. This aligns with common cache design practices that
favor power-of-two counts for efficient indexing and addressing.
BUG=b:306677879
BRANCH=firmware-rex-15709.B
TEST=Verified functionality on google/ovis and google/rex (including
a non-power-of-two Ovis configuration).
Change-Id: I819e0d1aeb4c1dbe1cdf3115b2e172588a6e8da5
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81268
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c
index c4d30a2..ee07214 100644
--- a/src/arch/x86/cpu_common.c
+++ b/src/arch/x86/cpu_common.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <commonlib/helpers.h>
#include <cpu/cpu.h>
#include <types.h>
@@ -234,3 +235,18 @@
return true;
}
+
+bool is_cache_sets_power_of_two(void)
+{
+ struct cpu_cache_info info;
+
+ if (!fill_cpu_cache_info(CACHE_L3, &info))
+ return false;
+
+ size_t cache_sets = cpu_get_cache_sets(&info);
+
+ if (IS_POWER_OF_2(cache_sets))
+ return true;
+
+ return false;
+}
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 0c4decf..fa0d5f4 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -329,6 +329,15 @@
*/
bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info);
+/*
+ * Determines whether the number of cache sets is a power of two.
+ *
+ * Cache designs often favor power-of-two set counts for efficient indexing
+ * and addressing. This function checks if the provided cache configuration
+ * adheres to this practice.
+ */
+bool is_cache_sets_power_of_two(void);
+
#if CONFIG(RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT)
unsigned int get_reserved_phys_addr_bits(void);
#else