sb/intel/bd82x6x/early_usb: Add USB TX/RX gains
Describe the USB 'current' settings based on MRC.bin that converts
the USB trace length to a predefined register value.
MRC.bin decides which setting to use based on the PC type, mobile
or desktop, and the trace length.
Tested: Lenovo X220 still boots.
Change-Id: I79d35ca16818daec03ee7f464349a4c8ee0f78e4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 88c8df5c..040b477 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -382,6 +382,18 @@
#define USBIR12 0x3530 /* 32bit */
#define USBIR13 0x3534 /* 32bit */
+/* Up to 5" onboard trace length */
+#define USBIR_TXRX_GAIN_MOBILE_LOW 0x20000153
+
+/* Up to 6" onboard trace length */
+#define USBIR_TXRX_GAIN_DESKTOP_LOW 0x20000F53
+
+/* Up to 14" onboard trace length, up to 8" on wires */
+#define USBIR_TXRX_GAIN_DEFAULT 0x20000f57
+
+/* Up to 10" onboard trace length, up to 15" on wires */
+#define USBIR_TXRX_GAIN_HIGH 0x2000055B
+
/* Miscellaneous Control Register */
#define MISCCTL 0x3590 /* 32bit */
/* USB Port Disable Override */