xeon_sp/cpx: Enable ACPI P-state support
Implement ACPI P-state support to enable driver acpi_cpufreq.
This patch leverages code from the Skylake project.
Tested=On OCP Delta Lake
cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
1501000 1500000 1400000 1300000 1200000 1100000 1000000 900000 800000
Change-Id: I3bf3ad7f82fbf196a2134a8138b10176fc8be2cc
Signed-off-by: Jingle Hsu <jingle_hsu@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44404
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
index 0df9847..dcbadf8 100644
--- a/src/soc/intel/xeon_sp/cpx/Kconfig
+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
@@ -72,6 +72,10 @@
config SOC_INTEL_COMMON_BLOCK_P2SB
def_bool y
+config CPU_BCLK_MHZ
+ int
+ default 100
+
select CACHE_MRC_SETTINGS
# CPX-SP has 2 IMCs, 3 channels per IMC, 2 DIMMs per channel