tree abd13797e87f92ceecaa414ac3f6c39104dea5ca
parent f1b1412068684e2e1973b594cb6f6b2026db4fb5
author Martin Roth <gaumless@gmail.com> 1695856482 -0600
committer Felix Held <felix-coreboot@felixheld.de> 1702405535 +0000

mb/amd/onyx: Add MPIO config

Add the device and chip entries for the various PCIe ports and MPIO
lane configuration. Below each PCIe bridge device with an external PCIe
port on the mainboard, an MPIO chip is added that provides the
corresponding MPIO configuration for this external PCIe port.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I8563c5a07eb8fd8ff9dd4e7b63fc9a7d485b1316
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78921
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>