AGESA boards: Clean up Ids.h and Filecode.h includes
Change-Id: I9cb63ff58900a39d7cd8e3da2b9a9a95c2a41a69
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c
index 4f66fad..f14365c 100644
--- a/src/mainboard/amd/bettong/BiosCallOuts.c
+++ b/src/mainboard/amd/bettong/BiosCallOuts.c
@@ -19,7 +19,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/pi/00660F01/chip.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/amd/bettong/OemCustomize.c b/src/mainboard/amd/bettong/OemCustomize.c
index 8d1ad4b..f26bf47 100644
--- a/src/mainboard/amd/bettong/OemCustomize.c
+++ b/src/mainboard/amd/bettong/OemCustomize.c
@@ -17,7 +17,6 @@
#include <PlatformMemoryConfiguration.h>
#include <boardid.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
/* Initialize Port descriptor (PCIe port, Lanes 8-15, PCI Device Number 3, ...) */
diff --git a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c
index ceb295e..71d3bd2 100644
--- a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c
+++ b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c
@@ -18,7 +18,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <device/azalia.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/amd/db-ft3b-lc/OemCustomize.c b/src/mainboard/amd/db-ft3b-lc/OemCustomize.c
index bffe888..278d497 100644
--- a/src/mainboard/amd/db-ft3b-lc/OemCustomize.c
+++ b/src/mainboard/amd/db-ft3b-lc/OemCustomize.c
@@ -17,7 +17,6 @@
#include <northbridge/amd/pi/agesawrapper.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
/* Initialize Port descriptor (PCIe port, Lane 3, PCI Device 2, Function 5) */
diff --git a/src/mainboard/amd/dinar/BiosCallOuts.c b/src/mainboard/amd/dinar/BiosCallOuts.c
index e4ec12e..d7cffd1 100644
--- a/src/mainboard/amd/dinar/BiosCallOuts.c
+++ b/src/mainboard/amd/dinar/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include "SB700.h"
#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
#include <stdlib.h>
diff --git a/src/mainboard/amd/dinar/buildOpts.c b/src/mainboard/amd/dinar/buildOpts.c
index e237ff0..071b146 100644
--- a/src/mainboard/amd/dinar/buildOpts.c
+++ b/src/mainboard/amd/dinar/buildOpts.c
@@ -24,8 +24,6 @@
*/
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
//#define OPTION_HW_DQS_REC_EN_TRAINING TRUE
/* AGESA will check the OEM configuration during preprocessing stage,
* coreboot enable -Wundef option, so we should make sure we have all contanstand defined
diff --git a/src/mainboard/amd/dinar/gpio.c b/src/mainboard/amd/dinar/gpio.c
index affda6f..d1d2b86 100644
--- a/src/mainboard/amd/dinar/gpio.c
+++ b/src/mainboard/amd/dinar/gpio.c
@@ -13,12 +13,10 @@
* GNU General Public License for more details.
*/
-#include "Filecode.h"
#include "Hudson-2.h"
#include "AmdSbLib.h"
#include "gpio.h"
-#define FILECODE UNASSIGNED_FILE_FILECODE
#ifndef SB_GPIO_REG01
#define SB_GPIO_REG01 1
diff --git a/src/mainboard/amd/inagua/OemCustomize.c b/src/mainboard/amd/inagua/OemCustomize.c
index e570e1e..7171b4c 100644
--- a/src/mainboard/amd/inagua/OemCustomize.c
+++ b/src/mainboard/amd/inagua/OemCustomize.c
@@ -20,7 +20,6 @@
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/*---------------------------------------------------------------------------------------*/
/**
diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index 1c5c424..cc7d1ef 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -26,8 +26,6 @@
*/
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/amd/lamar/BiosCallOuts.c b/src/mainboard/amd/lamar/BiosCallOuts.c
index 88e5299..4eda8d5 100644
--- a/src/mainboard/amd/lamar/BiosCallOuts.c
+++ b/src/mainboard/amd/lamar/BiosCallOuts.c
@@ -16,7 +16,6 @@
#include "AGESA.h"
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/amd/lamar/OemCustomize.c b/src/mainboard/amd/lamar/OemCustomize.c
index e2c9a69..32f8c23 100644
--- a/src/mainboard/amd/lamar/OemCustomize.c
+++ b/src/mainboard/amd/lamar/OemCustomize.c
@@ -16,7 +16,6 @@
#include <northbridge/amd/pi/agesawrapper.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
diff --git a/src/mainboard/amd/olivehill/BiosCallOuts.c b/src/mainboard/amd/olivehill/BiosCallOuts.c
index ad81edf..e56f552 100644
--- a/src/mainboard/amd/olivehill/BiosCallOuts.c
+++ b/src/mainboard/amd/olivehill/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/amd/olivehill/OemCustomize.c b/src/mainboard/amd/olivehill/OemCustomize.c
index b0aa33b..d8171ad 100644
--- a/src/mainboard/amd/olivehill/OemCustomize.c
+++ b/src/mainboard/amd/olivehill/OemCustomize.c
@@ -15,14 +15,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index 1d3fe77..b4afa30 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
#define INSTALL_FT3_SOCKET_SUPPORT TRUE
#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
diff --git a/src/mainboard/amd/olivehillplus/BiosCallOuts.c b/src/mainboard/amd/olivehillplus/BiosCallOuts.c
index 49bc402..c6ed492 100644
--- a/src/mainboard/amd/olivehillplus/BiosCallOuts.c
+++ b/src/mainboard/amd/olivehillplus/BiosCallOuts.c
@@ -16,7 +16,6 @@
#include "AGESA.h"
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/amd/olivehillplus/OemCustomize.c b/src/mainboard/amd/olivehillplus/OemCustomize.c
index ac60c42..0511653 100644
--- a/src/mainboard/amd/olivehillplus/OemCustomize.c
+++ b/src/mainboard/amd/olivehillplus/OemCustomize.c
@@ -15,7 +15,6 @@
#include <northbridge/amd/pi/agesawrapper.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
/* Initialize Port descriptor (PCIe port, Lane 3, PCI Device 2, Function 5) */
diff --git a/src/mainboard/amd/parmer/BiosCallOuts.c b/src/mainboard/amd/parmer/BiosCallOuts.c
index dd7c6dd..7a10ad9 100644
--- a/src/mainboard/amd/parmer/BiosCallOuts.c
+++ b/src/mainboard/amd/parmer/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/amd/parmer/OemCustomize.c b/src/mainboard/amd/parmer/OemCustomize.c
index c16e6d9..494215f 100644
--- a/src/mainboard/amd/parmer/OemCustomize.c
+++ b/src/mainboard/amd/parmer/OemCustomize.c
@@ -15,14 +15,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
* Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping)
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index 49a9feb..795112c 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
diff --git a/src/mainboard/amd/persimmon/OemCustomize.c b/src/mainboard/amd/persimmon/OemCustomize.c
index c0dceff..e048e6c 100644
--- a/src/mainboard/amd/persimmon/OemCustomize.c
+++ b/src/mainboard/amd/persimmon/OemCustomize.c
@@ -20,7 +20,6 @@
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/**
* OemCustomizeInitEarly
diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index 670010d..3fed0ed 100644
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -26,8 +26,6 @@
*/
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/amd/south_station/OemCustomize.c b/src/mainboard/amd/south_station/OemCustomize.c
index a631eb0..1f5297ae 100644
--- a/src/mainboard/amd/south_station/OemCustomize.c
+++ b/src/mainboard/amd/south_station/OemCustomize.c
@@ -20,7 +20,6 @@
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/*---------------------------------------------------------------------------------------*/
/**
diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c
index 38a272d..542d5b6 100644
--- a/src/mainboard/amd/south_station/buildOpts.c
+++ b/src/mainboard/amd/south_station/buildOpts.c
@@ -26,8 +26,6 @@
*/
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/amd/thatcher/BiosCallOuts.c b/src/mainboard/amd/thatcher/BiosCallOuts.c
index 3ab174c..f161e38 100644
--- a/src/mainboard/amd/thatcher/BiosCallOuts.c
+++ b/src/mainboard/amd/thatcher/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/amd/thatcher/OemCustomize.c b/src/mainboard/amd/thatcher/OemCustomize.c
index 3f2563b..f91bf2a 100644
--- a/src/mainboard/amd/thatcher/OemCustomize.c
+++ b/src/mainboard/amd/thatcher/OemCustomize.c
@@ -15,14 +15,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
* Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping)
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index 7bc5a77..2f0b7ca 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.c b/src/mainboard/amd/torpedo/BiosCallOuts.c
index 38206ff..3e3d252 100644
--- a/src/mainboard/amd/torpedo/BiosCallOuts.c
+++ b/src/mainboard/amd/torpedo/BiosCallOuts.c
@@ -16,7 +16,6 @@
#include "AGESA.h"
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include "Hudson-2.h"
#include <stdlib.h>
#include <southbridge/amd/cimx/sb700/gpio_oem.h>
diff --git a/src/mainboard/amd/torpedo/OemCustomize.c b/src/mainboard/amd/torpedo/OemCustomize.c
index 8dc5aff..196e8bb 100644
--- a/src/mainboard/amd/torpedo/OemCustomize.c
+++ b/src/mainboard/amd/torpedo/OemCustomize.c
@@ -21,7 +21,6 @@
#include <PlatformMemoryConfiguration.h>
#include "amdlib.h"
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X12_F12PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
// Initialize Port descriptor (PCIe port, Lanes 8:15, PCI Device Number 2, ...)
diff --git a/src/mainboard/amd/torpedo/buildOpts.c b/src/mainboard/amd/torpedo/buildOpts.c
index 656102d..07850d6 100644
--- a/src/mainboard/amd/torpedo/buildOpts.c
+++ b/src/mainboard/amd/torpedo/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/amd/torpedo/gpio.c b/src/mainboard/amd/torpedo/gpio.c
index 03ab409..5a77dc0 100644
--- a/src/mainboard/amd/torpedo/gpio.c
+++ b/src/mainboard/amd/torpedo/gpio.c
@@ -13,12 +13,10 @@
* GNU General Public License for more details.
*/
-#include "Filecode.h"
#include "SbPlatform.h"
#include "gpio.h"
#include "vendorcode/amd/cimx/sb900/AmdSbLib.h"
-#define FILECODE UNASSIGNED_FILE_FILECODE
#ifndef SB_GPIO_REG01
#define SB_GPIO_REG01 1
diff --git a/src/mainboard/amd/union_station/OemCustomize.c b/src/mainboard/amd/union_station/OemCustomize.c
index 00db12c..6f9b3b4 100644
--- a/src/mainboard/amd/union_station/OemCustomize.c
+++ b/src/mainboard/amd/union_station/OemCustomize.c
@@ -15,16 +15,13 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
#include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
#include <string.h>
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/*---------------------------------------------------------------------------------------*/
/**
diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c
index 38a272d..542d5b6 100644
--- a/src/mainboard/amd/union_station/buildOpts.c
+++ b/src/mainboard/amd/union_station/buildOpts.c
@@ -26,8 +26,6 @@
*/
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/asrock/e350m1/OemCustomize.c b/src/mainboard/asrock/e350m1/OemCustomize.c
index 892e1c4..f48559e 100644
--- a/src/mainboard/asrock/e350m1/OemCustomize.c
+++ b/src/mainboard/asrock/e350m1/OemCustomize.c
@@ -15,16 +15,13 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
#include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
#include <string.h>
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/*---------------------------------------------------------------------------------------*/
/**
diff --git a/src/mainboard/asrock/e350m1/buildOpts.c b/src/mainboard/asrock/e350m1/buildOpts.c
index bdda82e..e1058be 100644
--- a/src/mainboard/asrock/e350m1/buildOpts.c
+++ b/src/mainboard/asrock/e350m1/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/asrock/imb-a180/BiosCallOuts.c b/src/mainboard/asrock/imb-a180/BiosCallOuts.c
index b2e6e42d..6f3b696 100644
--- a/src/mainboard/asrock/imb-a180/BiosCallOuts.c
+++ b/src/mainboard/asrock/imb-a180/BiosCallOuts.c
@@ -18,7 +18,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include <stdlib.h>
diff --git a/src/mainboard/asrock/imb-a180/OemCustomize.c b/src/mainboard/asrock/imb-a180/OemCustomize.c
index 7cb8d56..0b09024 100644
--- a/src/mainboard/asrock/imb-a180/OemCustomize.c
+++ b/src/mainboard/asrock/imb-a180/OemCustomize.c
@@ -15,14 +15,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c
index 07431e3..a2b04ca 100644
--- a/src/mainboard/asrock/imb-a180/buildOpts.c
+++ b/src/mainboard/asrock/imb-a180/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
#define INSTALL_FT3_SOCKET_SUPPORT TRUE
#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
diff --git a/src/mainboard/asus/f2a85-m/OemCustomize.c b/src/mainboard/asus/f2a85-m/OemCustomize.c
index 6f4aa823..316a110 100644
--- a/src/mainboard/asus/f2a85-m/OemCustomize.c
+++ b/src/mainboard/asus/f2a85-m/OemCustomize.c
@@ -21,7 +21,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
* Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping)
diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c
index ab9e151..42e91dd 100644
--- a/src/mainboard/asus/f2a85-m/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m/buildOpts.c
@@ -41,7 +41,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
diff --git a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
index cb9f981..af618d4 100644
--- a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
+++ b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/bap/ode_e20XX/OemCustomize.c b/src/mainboard/bap/ode_e20XX/OemCustomize.c
index 00d51b6..8c59201 100644
--- a/src/mainboard/bap/ode_e20XX/OemCustomize.c
+++ b/src/mainboard/bap/ode_e20XX/OemCustomize.c
@@ -15,14 +15,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
/* Initialize Port descriptor (PCIe port, Lanes 2-3, PCI Device Number 2, Function 4) */
diff --git a/src/mainboard/bap/ode_e20XX/buildOpts.c b/src/mainboard/bap/ode_e20XX/buildOpts.c
index b8f717f..44e4a75 100644
--- a/src/mainboard/bap/ode_e20XX/buildOpts.c
+++ b/src/mainboard/bap/ode_e20XX/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
#define INSTALL_FT3_SOCKET_SUPPORT TRUE
#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
diff --git a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c
index 1001512..64ee785 100644
--- a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c
+++ b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c
@@ -16,7 +16,6 @@
#include "AGESA.h"
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/bap/ode_e21XX/OemCustomize.c b/src/mainboard/bap/ode_e21XX/OemCustomize.c
index 3750ba4..e97ad48 100644
--- a/src/mainboard/bap/ode_e21XX/OemCustomize.c
+++ b/src/mainboard/bap/ode_e21XX/OemCustomize.c
@@ -15,7 +15,6 @@
#include <northbridge/amd/pi/agesawrapper.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
/* Initialize Port descriptor (PCIe port, Lanes 2-3, PCI Device 2, Function 4) */
diff --git a/src/mainboard/biostar/am1ml/BiosCallOuts.c b/src/mainboard/biostar/am1ml/BiosCallOuts.c
index 3cdd727..4c58d93 100644
--- a/src/mainboard/biostar/am1ml/BiosCallOuts.c
+++ b/src/mainboard/biostar/am1ml/BiosCallOuts.c
@@ -19,7 +19,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include <stdlib.h>
diff --git a/src/mainboard/biostar/am1ml/OemCustomize.c b/src/mainboard/biostar/am1ml/OemCustomize.c
index 2fa9719..42cf0790 100644
--- a/src/mainboard/biostar/am1ml/OemCustomize.c
+++ b/src/mainboard/biostar/am1ml/OemCustomize.c
@@ -15,14 +15,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
diff --git a/src/mainboard/biostar/am1ml/buildOpts.c b/src/mainboard/biostar/am1ml/buildOpts.c
index 404935b..3349757 100644
--- a/src/mainboard/biostar/am1ml/buildOpts.c
+++ b/src/mainboard/biostar/am1ml/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
#define INSTALL_FT3_SOCKET_SUPPORT TRUE
#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
diff --git a/src/mainboard/elmex/pcm205400/OemCustomize.c b/src/mainboard/elmex/pcm205400/OemCustomize.c
index c0dceff..e048e6c 100644
--- a/src/mainboard/elmex/pcm205400/OemCustomize.c
+++ b/src/mainboard/elmex/pcm205400/OemCustomize.c
@@ -20,7 +20,6 @@
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/**
* OemCustomizeInitEarly
diff --git a/src/mainboard/elmex/pcm205400/buildOpts.c b/src/mainboard/elmex/pcm205400/buildOpts.c
index eb6cf33..a90ee79 100644
--- a/src/mainboard/elmex/pcm205400/buildOpts.c
+++ b/src/mainboard/elmex/pcm205400/buildOpts.c
@@ -26,8 +26,6 @@
*/
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the cpu family. */
diff --git a/src/mainboard/gizmosphere/gizmo/OemCustomize.c b/src/mainboard/gizmosphere/gizmo/OemCustomize.c
index 173f7f9..2d8a893 100644
--- a/src/mainboard/gizmosphere/gizmo/OemCustomize.c
+++ b/src/mainboard/gizmosphere/gizmo/OemCustomize.c
@@ -16,7 +16,6 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
#include "PlatformGnbPcieComplex.h"
diff --git a/src/mainboard/gizmosphere/gizmo/buildOpts.c b/src/mainboard/gizmosphere/gizmo/buildOpts.c
index d891875..618679d 100644
--- a/src/mainboard/gizmosphere/gizmo/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo/buildOpts.c
@@ -28,8 +28,6 @@
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c b/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c
index 4fb7623..e6bc68e 100644
--- a/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c
+++ b/src/mainboard/gizmosphere/gizmo2/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "imc.h"
diff --git a/src/mainboard/gizmosphere/gizmo2/OemCustomize.c b/src/mainboard/gizmosphere/gizmo2/OemCustomize.c
index 2f25a89..b5a8173 100644
--- a/src/mainboard/gizmosphere/gizmo2/OemCustomize.c
+++ b/src/mainboard/gizmosphere/gizmo2/OemCustomize.c
@@ -15,14 +15,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
diff --git a/src/mainboard/gizmosphere/gizmo2/buildOpts.c b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
index b8f717f..44e4a75 100644
--- a/src/mainboard/gizmosphere/gizmo2/buildOpts.c
+++ b/src/mainboard/gizmosphere/gizmo2/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
#define INSTALL_FT3_SOCKET_SUPPORT TRUE
#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
diff --git a/src/mainboard/hp/abm/BiosCallOuts.c b/src/mainboard/hp/abm/BiosCallOuts.c
index 785fb96..8c08052 100644
--- a/src/mainboard/hp/abm/BiosCallOuts.c
+++ b/src/mainboard/hp/abm/BiosCallOuts.c
@@ -18,7 +18,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include "Ids.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include <stdlib.h>
diff --git a/src/mainboard/hp/abm/OemCustomize.c b/src/mainboard/hp/abm/OemCustomize.c
index 4eab307..63e69cc 100644
--- a/src/mainboard/hp/abm/OemCustomize.c
+++ b/src/mainboard/hp/abm/OemCustomize.c
@@ -16,14 +16,11 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
-#include "Filecode.h"
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
diff --git a/src/mainboard/hp/abm/buildOpts.c b/src/mainboard/hp/abm/buildOpts.c
index 2f31c5e..f217cfc 100644
--- a/src/mainboard/hp/abm/buildOpts.c
+++ b/src/mainboard/hp/abm/buildOpts.c
@@ -32,8 +32,6 @@
#include <stdlib.h>
#include "AGESA.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
#define INSTALL_FT3_SOCKET_SUPPORT TRUE
#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c b/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c
index d5a0b51..cb6e80f 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c
@@ -21,7 +21,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
* Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping)
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
index 709c81f..1ab96bf 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
@@ -43,7 +43,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
diff --git a/src/mainboard/jetway/nf81-t56n-lf/OemCustomize.c b/src/mainboard/jetway/nf81-t56n-lf/OemCustomize.c
index cccb78c..6b039f7 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/OemCustomize.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/OemCustomize.c
@@ -21,7 +21,6 @@
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/**
* OemCustomizeInitEarly
diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
index 390d28b..8512afb 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
@@ -41,7 +41,6 @@
#include <vendorcode/amd/agesa/f14/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f14/Proc/Mem/mn.h>
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
diff --git a/src/mainboard/lenovo/g505s/OemCustomize.c b/src/mainboard/lenovo/g505s/OemCustomize.c
index d5a0b51..cb6e80f 100644
--- a/src/mainboard/lenovo/g505s/OemCustomize.c
+++ b/src/mainboard/lenovo/g505s/OemCustomize.c
@@ -21,7 +21,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
* Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping)
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 80b91ba..e4365d9 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -43,7 +43,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
diff --git a/src/mainboard/lippert/frontrunner-af/OemCustomize.c b/src/mainboard/lippert/frontrunner-af/OemCustomize.c
index 80f568f..aaaec7f 100644
--- a/src/mainboard/lippert/frontrunner-af/OemCustomize.c
+++ b/src/mainboard/lippert/frontrunner-af/OemCustomize.c
@@ -15,16 +15,13 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
#include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
#include <string.h>
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/*---------------------------------------------------------------------------------------*/
/**
diff --git a/src/mainboard/lippert/frontrunner-af/buildOpts.c b/src/mainboard/lippert/frontrunner-af/buildOpts.c
index 30982b5..3a3ab74 100644
--- a/src/mainboard/lippert/frontrunner-af/buildOpts.c
+++ b/src/mainboard/lippert/frontrunner-af/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/lippert/toucan-af/OemCustomize.c b/src/mainboard/lippert/toucan-af/OemCustomize.c
index 0bb725e..cf68ee4 100644
--- a/src/mainboard/lippert/toucan-af/OemCustomize.c
+++ b/src/mainboard/lippert/toucan-af/OemCustomize.c
@@ -15,16 +15,13 @@
#include "AGESA.h"
#include "amdlib.h"
-#include "Ids.h"
#include "heapManager.h"
#include <PlatformMemoryConfiguration.h>
#include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
#include <string.h>
#include <northbridge/amd/agesa/state_machine.h>
-#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/*---------------------------------------------------------------------------------------*/
/**
diff --git a/src/mainboard/lippert/toucan-af/buildOpts.c b/src/mainboard/lippert/toucan-af/buildOpts.c
index 30982b5..3a3ab74 100644
--- a/src/mainboard/lippert/toucan-af/buildOpts.c
+++ b/src/mainboard/lippert/toucan-af/buildOpts.c
@@ -27,8 +27,6 @@
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/msi/ms7721/OemCustomize.c b/src/mainboard/msi/ms7721/OemCustomize.c
index d527792..a5e2a4c 100644
--- a/src/mainboard/msi/ms7721/OemCustomize.c
+++ b/src/mainboard/msi/ms7721/OemCustomize.c
@@ -22,7 +22,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/*
* Lane ID Mapping (from Fam15h BKDG: Table 45: Lane Id Mapping)
diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c
index 5191574..87fc20f 100644
--- a/src/mainboard/msi/ms7721/buildOpts.c
+++ b/src/mainboard/msi/ms7721/buildOpts.c
@@ -41,7 +41,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
diff --git a/src/mainboard/pcengines/apu1/buildOpts.c b/src/mainboard/pcengines/apu1/buildOpts.c
index 798b385..36b4145 100644
--- a/src/mainboard/pcengines/apu1/buildOpts.c
+++ b/src/mainboard/pcengines/apu1/buildOpts.c
@@ -26,8 +26,6 @@
*/
#include <stdlib.h>
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* Select the CPU family. */
diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c
index 1dc0e1c..dca6b44 100644
--- a/src/mainboard/pcengines/apu2/BiosCallOuts.c
+++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c
@@ -17,8 +17,6 @@
#include "amdlib.h"
#include <spd_bin.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
-#include "OptionsIds.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "gpio_ftns.h"
diff --git a/src/mainboard/pcengines/apu2/OemCustomize.c b/src/mainboard/pcengines/apu2/OemCustomize.c
index ea494a4..3c28ac5 100644
--- a/src/mainboard/pcengines/apu2/OemCustomize.c
+++ b/src/mainboard/pcengines/apu2/OemCustomize.c
@@ -15,7 +15,6 @@
#include <northbridge/amd/pi/agesawrapper.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
diff --git a/src/mainboard/supermicro/h8qgi/BiosCallOuts.c b/src/mainboard/supermicro/h8qgi/BiosCallOuts.c
index 9b742cb..d8b98b5 100644
--- a/src/mainboard/supermicro/h8qgi/BiosCallOuts.c
+++ b/src/mainboard/supermicro/h8qgi/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include <arch/io.h>
#ifdef __PRE_RAM__
diff --git a/src/mainboard/supermicro/h8qgi/buildOpts.c b/src/mainboard/supermicro/h8qgi/buildOpts.c
index e93e83e..0b39b9c 100644
--- a/src/mainboard/supermicro/h8qgi/buildOpts.c
+++ b/src/mainboard/supermicro/h8qgi/buildOpts.c
@@ -17,8 +17,6 @@
#include "AGESA.h"
#include "AdvancedApi.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* AGESA will check the OEM configuration during preprocessing stage,
* coreboot enable -Wundef option, so we should make sure we have all contanstand defined
diff --git a/src/mainboard/supermicro/h8scm/BiosCallOuts.c b/src/mainboard/supermicro/h8scm/BiosCallOuts.c
index 30c1198..6fb9724 100644
--- a/src/mainboard/supermicro/h8scm/BiosCallOuts.c
+++ b/src/mainboard/supermicro/h8scm/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include <stdlib.h>
const BIOS_CALLOUT_STRUCT BiosCallouts[] =
diff --git a/src/mainboard/supermicro/h8scm/buildOpts.c b/src/mainboard/supermicro/h8scm/buildOpts.c
index ec2dca0..313aee3 100644
--- a/src/mainboard/supermicro/h8scm/buildOpts.c
+++ b/src/mainboard/supermicro/h8scm/buildOpts.c
@@ -17,8 +17,6 @@
#include "AGESA.h"
#include "AdvancedApi.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
//#define OPTION_HW_DQS_REC_EN_TRAINING TRUE
/* AGESA will check the OEM configuration during preprocessing stage,
* coreboot enable -Wundef option, so we should make sure we have all contanstand defined
diff --git a/src/mainboard/tyan/s8226/BiosCallOuts.c b/src/mainboard/tyan/s8226/BiosCallOuts.c
index b7d263d..6cddad2 100644
--- a/src/mainboard/tyan/s8226/BiosCallOuts.c
+++ b/src/mainboard/tyan/s8226/BiosCallOuts.c
@@ -17,7 +17,6 @@
#include "amdlib.h"
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "Ids.h"
#include <arch/io.h>
#include <stdlib.h>
diff --git a/src/mainboard/tyan/s8226/buildOpts.c b/src/mainboard/tyan/s8226/buildOpts.c
index 7c5ea5a..7a3afa9 100644
--- a/src/mainboard/tyan/s8226/buildOpts.c
+++ b/src/mainboard/tyan/s8226/buildOpts.c
@@ -17,8 +17,6 @@
#include "AGESA.h"
#include "AdvancedApi.h"
-#include "Filecode.h"
-#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
/* AGESA will check the OEM configuration during preprocessing stage,
* coreboot enable -Wundef option, so we should make sure we have all contanstand defined