commit a193308fabcfc9429c3d18ac16964c728d6b4942
author Subrata Banik <subratabanik@google.com> Mon May 22 14:22:37 2023 +0530
committer Subrata Banik <subratabanik@google.com> Thu May 25 05:04:06 2023 +0000
tree 4a77ce12c2112427dfdff8b99775c89b7a138b4e
parent 90a825a7bcb775827c5caa678794138e71df9930

soc/intel/meteorlake: Set SaGv work points as enum macro

This patch adds an enum macro to define the different SaGv work points.
The enum macro is named `sagv_wp_bitmap` and it has three values:

The goal is to choose the optimal SaGv work point for the target
platform after considering the two inputs as power consumption and performance. The first group is for workloads that require high performance, even if it means consuming more power. The second group
is for workloads that can tolerate lower performance, in order to save
power.

SAGV_POINTS_0_1: The highest power consumption, but also the highest
                 performance.
SAGV_POINTS_0_1_2: A lower power consumption than work point
                   SAGV_POINTS_0_1, but also a lower performance.
SAGV_POINTS_0_1_2_3: The lowest power consumption, but also the lowest
                     performance.

Set SaGv work points after reviewing the power and performance impact
with SaGv set to 1 (Enabled) and various considering various work points
between 0-3 being enabled.

BUG=b:267879107
TEST=Able to build google/rex.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I4af0038f2799a458d1b006270068341f65d36609
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75362
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/meteorlake/chip.h

diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index f63d977..9d4ff79 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -139,6 +139,16 @@
 		SAGV_ENABLED,
 	} sagv;
 
+	/* System Agent dynamic frequency work points that memory will be training
+	 * at the enabled frequencies. Possible work points are:
+	 * 0x3:Points0_1, 0x7:Points0_1_2, 0xF:AllPoints0_1_2_3
+	 */
+	enum {
+		SAGV_POINTS_0_1 = 0x03,
+		SAGV_POINTS_0_1_2 = 0x07,
+		SAGV_POINTS_0_1_2_3 = 0x0f,
+	} sagv_wp_bitmap;
+
 	/* Rank Margin Tool. 1:Enable, 0:Disable */
 	uint8_t rmt;
 

src/soc/intel/meteorlake/romstage/fsp_params.c

diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index ec5a3af..38bd443 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -124,6 +124,18 @@
 		const struct soc_intel_meteorlake_config *config)
 {
 	m_cfg->SaGv = config->sagv;
+	if (m_cfg->SaGv) {
+		/*
+		 * Set SaGv work points after reviewing the power and performance impact
+		 * with SaGv set to 1 (Enabled) and various work points between 0-3 being
+		 * enabled.
+		 */
+		if (config->sagv_wp_bitmap)
+			m_cfg->SaGvWpMask = config->sagv_wp_bitmap;
+		else
+			m_cfg->SaGvWpMask = SAGV_POINTS_0_1_2_3;
+	}
+
 	m_cfg->RMT = config->rmt;
 	/* Enable MRC Fast Boot */
 	m_cfg->MrcFastBoot = 1;