mb/supermicro/x11: Make use of chipset devicetree

Use the references from the chipset devicetree as this makes the
comments superfluous and remove devices which are turned off.

Change-Id: I5176aa56ecaa52d0f42455bc7176b0415a6199ec
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
index 66206a6..29252fe 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
@@ -36,25 +36,29 @@
 
 	device domain 0 on
 		subsystemid 0x15d9 0x0896 inherit
-		device pci 01.0 on	# CPU PCIe Port (x16) / PCIe Slot 6 (JPCIE6)
+		device ref peg0 on
+			# Slot JPCIE6
 			smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "CPU SLOT6 PCI-E 3.0 X8(IN X16)" "SlotDataBusWidth8X"
 		end
-		device pci 01.1 on	# CPU PCIe Port (x8) / PCIe Slot 7 (JPCIE7)
+		device ref peg1 on
+			# Slot JPCIE7
 			smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "CPU SLOT7 PCI-E 3.0 X8" "SlotDataBusWidth8X"
 		end
-		device pci 1c.0 on	# PCH PCIe Port 1 / PCIe Slot 4 (JPCIE4)
+		device ref pcie_rp1 on
+			# Slot JPCIE4
 			register "PcieRpEnable[0]" = "1"
 			register "PcieRpLtrEnable[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"
 			smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "PCH SLOT4 PCI-E 3.0 X4(IN X8)" "SlotDataBusWidth4X"
 		end
-		device pci 1c.4 on	# PCH PCIe Port 5 / PCIe Slot 5 (JPCIE5)
+		device ref pcie_rp5 on
+			# Slot JPCIE5
 			register "PcieRpEnable[4]" = "1"
 			register "PcieRpLtrEnable[4]" = "1"
 			register "PcieRpAdvancedErrorReporting[4]" = "1"
 			smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "PCH SLOT5 PCI-E 3.0 X4(IN X8)" "SlotDataBusWidth4X"
 		end
-		device pci 1d.0 on	# PCH PCIe Port 9
+		device ref pcie_rp9 on
 			register "PcieRpEnable[8]" = "1"
 			register "PcieRpLtrEnable[8]" = "1"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"
@@ -62,7 +66,7 @@
 				subsystemid 0x15d9 0x1533
 			end
 		end
-		device pci 1d.1 on	# PCH PCIe Port 10
+		device ref pcie_rp10 on
 			register "PcieRpEnable[9]" = "1"
 			register "PcieRpLtrEnable[9]" = "1"
 			register "PcieRpAdvancedErrorReporting[9]" = "1"
@@ -70,7 +74,7 @@
 				subsystemid 0x15d9 0x1533
 			end
 		end
-		device pci 1d.2 on	# PCH PCIe Port 11
+		device ref pcie_rp11 on
 			register "PcieRpEnable[10]" = "1"
 			register "PcieRpLtrEnable[10]" = "1"
 			register "PcieRpAdvancedErrorReporting[10]" = "1"
@@ -78,7 +82,7 @@
 				device pci 00.0 on end	# Aspeed 2400 VGA
 			end
 		end
-		device pci 1f.0 on	# LPC Interface
+		device ref lpc_espi on
 			chip drivers/ipmi
 				use pch_gpio as gpio_dev
 				register "bmc_jumper_gpio" = "GPP_D22" # JPB1