commit a033d8c808faca13a80e59f5a6e2c2599b3dbbb8
author Arthur Heymans <arthur@aheymans.xyz> Wed May 05 14:20:03 2021 +0200
committer Patrick Georgi <pgeorgi@google.com> Thu May 06 14:31:52 2021 +0000
tree 56a35ae5c212177c91671196bc002c4f2fad9064
parent 4e3658fd57bd39acf66cd8061b22c3533068feab

arch/x86: Always include walkcbfs.S

Let the linker decide if this code is needed.

Change-Id: I26fb19d461db39ce554af7b948f0d10a12920299
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/arch/x86/Makefile.inc

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index a3c61c4..0737892 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -91,7 +91,7 @@
 $(eval $(call early_x86_stage,bootblock,elf64-x86-64))
 endif
 
-bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += walkcbfs.S
+bootblock-y += walkcbfs.S
 
 endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
 

src/cpu/qemu-x86/Makefile.inc

diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc
index 3f27e8b..fb560d6 100644
--- a/src/cpu/qemu-x86/Makefile.inc
+++ b/src/cpu/qemu-x86/Makefile.inc
@@ -2,7 +2,6 @@
 
 bootblock-y += cache_as_ram_bootblock.S
 bootblock-y += bootblock.c
-bootblock-$(CONFIG_ARCH_BOOTBLOCK_X86_64) += $(top)/src/arch/x86/walkcbfs.S
 
 romstage-y += ../intel/car/romstage.c